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Volumn 46, Issue 10, 1999, Pages 1301-1308

Models for systematic design and verification of frequency synthesizers

Author keywords

[No Author keywords available]

Indexed keywords

MATHEMATICAL MODELS; SPURIOUS SIGNAL NOISE;

EID: 0033318929     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.799680     Document Type: Article
Times cited : (12)

References (13)
  • 4
    • 33749906356 scopus 로고    scopus 로고
    • IEEE 1076.1 Working Group, IEEE Standard VHDL 1076.1 Language Reference Manual-Analog and Mixed-Signal Extensions to VHDL 1076, July 1997
    • IEEE 1076.1 Working Group, IEEE Standard VHDL 1076.1 Language Reference Manual-Analog and Mixed-Signal Extensions to VHDL 1076, July 1997.
  • 5
    • 33749932011 scopus 로고    scopus 로고
    • OVI Working Group, OVI Standard VERILOG AMS: Language Reference Manual-Analog and Mixed-Signal Extensions, 1998
    • OVI Working Group, OVI Standard VERILOG AMS: Language Reference Manual-Analog and Mixed-Signal Extensions, 1998.
  • 11
    • 0024904709 scopus 로고
    • "ISAAC: A symbolic simulator for analog integrated circuits,"
    • Dec.
    • G. Gielen, H. Walscharts, and W. Sansen, "ISAAC: A symbolic simulator for analog integrated circuits," IEEE J. Solid State Circuits, vol. 24, pp. 1587-1597, Dec. 1989.
    • (1989) IEEE J. Solid State Circuits , vol.24 , pp. 1587-1597
    • Gielen, G.1    Walscharts, H.2    Sansen, W.3
  • 12
    • 0031638301 scopus 로고    scopus 로고
    • "Nonlinear behavioral modeling and phase noise evaluation in phase locked loops,"
    • Santa Clara, CA, May 1998, pp. 53-56.
    • B. De Smedt and G. Gielen, "Nonlinear behavioral modeling and phase noise evaluation in phase locked loops," in Proc. Custom Integrated Circuits Conf. (CICC), Santa Clara, CA, May 1998, pp. 53-56.
    • Proc. Custom Integrated Circuits Conf. (CICC)
    • De Smedt, B.1    Gielen, G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.