Performance-centering optimization for system-level analog design exploration

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 422-429

  Li, Xin ^a   Wang, Jian ^a   Pileggi, Lawrence T ^a   Chen, Tun Shih ^b   Chiang, Wanju ^b  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY CONDITIONS; CONSTRAINT THEORY; DESIGN; NONBIBLIOGRAPHIC RETRIEVAL SYSTEMS; OPTIMIZATION;

ANALOG DESIGN OPTIMIZATION; CIRCUIT BLOCK DESIGN; CONSTRAINT BOUNDARY; DATA RECOVERY;

NETWORKS (CIRCUITS);

EID: 33751418467     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560105     Document Type: Conference Paper

References (15)

1. M. Hershenson, "Efficient description of the design space of analog circuits," IEEE/ACM DAC, pp. 970-973, 2003.
2. B. Smedt and G. Gielen, "WATSON: design space boundary exploration and model generation for analog and RF IC design," IEEE Trans. CAD, vol. 22, no. 2, pp. 213-224, Feb. 2003.
3. G. Stehr, H. Graeb and K. Antreich, "Performance trade-off analysis of analog circuits by normal-boundary intersection," IEEE/ACM DAC, pp. 958-963, 2003.
4. G. Stehr, H. Graeb and K. Antreich, "Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing," IEEE/ACM ICCAD, pp. 847-854, 2004.
5. H. Abdel-Malek and A. Hassan, "The ellipsoidal technique for design centering and region approximation," IEEE Trans. CAD, vol. 10, no. 8, pp. 1006-1014, Aug. 1991.
6. K. Antreich, H. Graeb and C. Wieser, "Circuit analysis and optimization driven by worst-case distances," IEEE. Trans. CAD, vol. 13, no. 1, pp. 57-71, Jan. 1994.
7. A. Seifi, K. Ponnambalam and J. Vlach, "A unified approach to statistical design centering of integrated circuits with correlated parameters," IEEE Trans. CAS-I, vol. 46, no. 1, pp. 190-196, Jan. 1999.
8. M. Hershenson, S. Boyd and T. Lee, "Optimal design of a CMOS Op-Amp via geometric programming," IEEE Trans. CAD, vol. 20, no. 1, pp. 1-21, Jan. 2001.
9. M Hershenson, "Design of pipeline analog-to-digital converters via geometric programming," IEEE/ACM ICCAD, pp. 317-324, 2002.
10. D. Bertseksa, Nonlinear Programming, Athena Scientific, 1999.
11. R. Phelps, M. Krasnicki, R. Rutenbar, L. Carley and J. Hellums, "Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search," IEEE Trans. CAD, vol. 19, no. 6, pp. 703-717, Jun. 2000.
12. G. Plas, G. Debyser, F. Leyn, K. Lampaert, J. Vandenbussche, G. Gielen, W. Sansen, P. Veselinovic and D. Leenaerts, "AMGIE - a synthesis environment for CMOS analog integrated circuits," IEEE Trans. CAD, vol. 20, no. 9, pp. 1037-1058, Sep. 2001.
13. F. Schenkel, M. Pronath, S. Zizala, R. Schwencker, H. Graeb and K. Antreich, "Mismatch analysis and direct yield optimization by spec-wise linearization and feasibility-guided search," IEEE/ACM DAC, pp. 858-863, 2001.
14. X. Li, P. Gopalakrishnan, Y. Xu and L. Pileggi, "Robust analog/RF circuit design with projection-based posynomial modeling," IEEE/ACM ICCAD, pp. 855-862, 2004.
15. B. Razavi, Phase-Locking in High-Performance Systems: From Devices to Architectures, IEEE Press, 2003.