Simulating open-via defects

Proceedings of the Asian Test Symposium

Volumn , Issue , 2007, Pages 265-270

  Spinner, Stefan ^a   Jiang, Jie ^a   Polian, Ilia ^a   Engelke, Piet ^a   Becker, Bernd ^a  

^a UNIVERSITY OF FREIBURG   (Germany)

Author keywords

Defect modeling; Fault simulation; Open via defects

Indexed keywords

INDUSTRIAL ENGINEERING; TESTING;

DEFECT COVERAGE; DEFECT DIAGNOSIS; DEFECT MODELING; ELECTRICAL PARAMETERS; FAILURE MECHANISMS; FAULT SIMULATION; GATE LEVELS; MANUFACTURING PROCESSES; MANUFACTURING TESTING; NANO SCALING; OPEN-VIA DEFECTS; TECHNOLOGY DATA;

DEFECTS;

EID: 48049113255     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ATS.2007.4388023     Document Type: Conference Paper

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