A persistent diagnostic technique for unstable defects

IEEE International Test Conference (TC)

Volumn , Issue , 2002, Pages 242-249

  Sato, Yasuo ^a   Yamazaki, Iwao ^a   Yamanaka, Hiroki ^a   Ikeda, Toshio ^a   Takakura, Masahiro ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; DELAY CIRCUITS; FAILURE ANALYSIS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS;

DELAY DEFECTS; OPEN DEFECTS; OPEN FAULT DIAGNOSIS; UNSTABLE DEFECTS;

INTEGRATED CIRCUIT TESTING;

EID: 0036444432     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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