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Volumn , Issue , 1998, Pages 228-236

Testing for floating gates defects in CMOS circuits

Author keywords

[No Author keywords available]

Indexed keywords

FLOATING GATES DEFECTS;

EID: 0032302090     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (43)

References (19)
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  • 4
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    • Topology dependence of floating gate faults in MOS circuits
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  • 5
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    • (1992) IEEE Trans. on Comp. Aided des , pp. 1450-1458
    • Renovell, M.1    Cambon, G.2
  • 6
    • 84895111084 scopus 로고    scopus 로고
    • Test methodologies sensitivity to defect parameters
    • Nov
    • M. Renovell and G. Cambon, "Test Methodologies Sensitivity to Defect Parameters", Proc. Int. Test Conf., pp. 607-616, Nov. 1997.
    • (1997) Proc. Int. Test Conf. , pp. 607-616
    • Renovell, M.1    Cambon, G.2
  • 7
    • 0026618712 scopus 로고
    • The behavior and testing implications of CMOS 1C gate open circuits
    • Oct
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    • Henderson, C.L.1    Soden, J.M.2    Hawkins, C.F.3
  • 8
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    • Probability analysis for CMOS floating gate faults
    • Feb
    • H.Xue, C. Di and J.A.G Jess, "Probability Analysis for CMOS Floating gate Faults", Proc. European Des. Test Conf, pp. 443-448, Feb. 1994.
    • (1994) Proc. European Des. Test Conf , pp. 443-448
    • Xue Di C, H.1    Jess, J.A.G.2
  • 10
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    • IDDQ testing of CMOS opens: An experimental study
    • A.D.Singh, H. Rasheed and W.W. Weber, "IDDQ Testing of CMOS Opens: An Experimental Study", Proc. Int. Test Conf, pp. 479-489, 1995.
    • (1995) Proc. Int. Test Conf , pp. 479-489
    • Singh, A.D.1    Rasheed, H.2    Weber, W.W.3
  • 14
    • 0028392267 scopus 로고
    • Electrical model of the floating gate defect in CMOS ICs: Implication on IDDQ testing
    • Mar
    • V.H. Champac, J.A. Rubio and J. Figueras, "Electrical Model of the Floating Gate Defect in CMOS ICs: Implication on IDDQ Testing", IEEE Trans. On Comp. Aided Des., Vol. 13, no. 3, pp. 359-369, Mar. 1994.
    • (1994) IEEE Trans. on Comp. Aided Des. , vol.13 , Issue.3 , pp. 359-369
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  • 15
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    • Testability of floating gate defects in sequential circuits
    • Apr
    • V.H. Champac and J. Figueras, "Testability of Floating Gate Defects in Sequential Circuits", 13'" IEEE VLSI Test Symposium, pp. 202-207, Apr. 1995.
    • (1995) 13th IEEE VLSI Test Symposium , pp. 202-207
    • Champac, V.H.1    Figueras, J.2
  • 16
    • 0030217085 scopus 로고    scopus 로고
    • IDDQ testing of single floating gate defects using a two-pattern vector
    • Aug
    • V.H. Champac and J. Figueras, "IDDQ Testing of Single Floating Gate Defects using a Two-Pattern Vector", IEE Electron. Letters, vol. 32, no. 17, pp. 1572-1574, Aug. 1996.
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    • Champac, V.H.1    Figueras, J.2
  • 17
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    • Residual charge on the faulty floating gate MOS transistor
    • Oct
    • S. Johnson, "Residual Charge on the Faulty Floating gate MOS Transistor", Proc. Int. Test Conf, Oct. 1994.
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  • 18
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  • 19
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    • M.A.Sc. Thesis, The University of British Columbia, Vancouver B.C., Canada, July
    • S. Rafiq, "Testing for Floating Gate Defects in CMOS Circuits", M.A.Sc. Thesis, The University of British Columbia, Vancouver B.C., Canada, July 1998.
    • (1998) Testing for Floating Gate Defects in CMOS Circuits
    • Rafiq, S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.