Noise-direct: A technique for power supply noise aware floorplanning using microarchitecture profiling

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2007, Pages 786-791

  Mohamood, Fayez ^a   Healy, Michael B ^a   Lim, Sung Kyu ^a   Lee, Hsien Hsin S ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

(E ,3E) PROCESS; AVERAGE-CASE; BUDGET CONSTRAINTS; CLOCK-GATING; CORRELATED SWITCHING; CURRENT CONSUMPTIONS; DECOUPLING CAPACITANCES; DESIGN AUTOMATION CONFERENCE (DAC); DESIGN METHODOLOGIES; EXPERIMENTAL RESULTS; FLOOR PLANNING; FLOOR-PLANNING; FORCE-DIRECTED; FUNCTIONAL MODULES; HIGH-FREQUENCY (HF); INDUCTIVE NOISE; IR DROPS; METRICS (CO); MICRO ARCHITECTURES; MODULE PLACEMENT; NOISE MARGIN (NM); NOISE-TOLERANT; NOVEL DESIGN METHODOLOGY; POWER CONSTRAINTS; POWER CONSUMPTION (CE); POWER DELIVERY NETWORKS; POWER INTEGRITY; POWER PINS; POWER SAVINGS; POWER-SUPPLY NOISE; SIGNAL-INTEGRITY (SI); SOUTH PACIFIC; SUPPLY NOISE; SUPPLY VOLTAGES; WIRE LENGTHS;

BUDGET CONTROL; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; DROPS; ELECTRIC POWER TRANSMISSION; ELECTRIC POWER UTILIZATION; FLUID MECHANICS; INDUSTRIAL ENGINEERING; MECHANIZATION; POWER ELECTRONICS; PROCESS DESIGN; PROCESS ENGINEERING; QUALITY ASSURANCE; RELIABILITY; SIGNAL PROCESSING;

ENERGY CONSERVATION;

EID: 46649092952     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2007.358085     Document Type: Conference Paper

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