Exploiting resonant behavior to reduce inductive noise

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn 31, Issue , 2004, Pages 288-299

  Powell, Michael D ^a   Vijaykumar, T N ^a  

^a Purdue University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INDUCTIVE NOISE; PROCESSOR CURRENT; RESONANCE BAND; RESONANT LOOPS;

ACOUSTIC IMPEDANCE; ACOUSTIC NOISE; CAPACITORS; ELECTRIC POTENTIAL; ENERGY DISSIPATION; NATURAL FREQUENCIES; SIGNAL PROCESSING; VARIATIONAL TECHNIQUES;

MICROPROCESSOR CHIPS;

EID: 4644231132     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

1. W. E. Boyce and R. C. DiPrima. Elementary Differential Equations and Boundary Value Problems. John Wiley and Sons, Inc., 1997.
2. D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A frame-work for architectural-level power analysis and optimizations. In Proceedings of the 27th Annual International Symposium on Computer Architecture, pages 83-94, June 2000.
3. D. Burger and T. M. Austin. The SimpleScalar tool set, version 2.0. Technical Report 1342, Computer Sciences Department, University of Wisconsin-Madison, June 1997.
4. R. A. DeCarlo and P.-M. Lin. Linear Circuit Analysis, volume 2. Prentice Hall, 1995.
5. W. El-Essawy, D. H. Albonesi, and B. Sinharoy. A microarchitectural-level step-power analysis tool. In International Symposium on Low Power Electronics and Design, pages 263-266, Aug. 2002.
6. B. Garben, M. F. McAllister, W. D. Becker, and R. Frech. Mid-frequency delta-i noise analysis of complex computer system boards with multiprocessor modules and verification by measurements. IEEE Transactions on Advanced Packaging, 24(3):294-302, 2001.
7. M. K. Gowan, L. L. Biro, and D. B. Jackson. Power considerations in the design of the alpha 21264 microprocessor. In Design Automation Conference (DAC), pages 726-731, 1998.
8. E. Grochowski, D. Ayers, and V. Tiwari. Microarchitectural simulation and control of di/dt-induced power supply voltage variation. In Eighth International Symposium on High Performance Computer Architecture (HPCA), pages 7-16, Feb. 2001.
9. D. J. Herrell and B. Beker. Modeling of power distribution systems for high-performance microprocessors. IEEE Transactions on Advanced Packaging, 22(3):240-248, 1999.
10. R. Joseph, D. Brooks, and M. Martonosi. Control techniques to eliminate voltage emergencies in high-performance processors. In Ninth International Symposium on High Performance Computer Architecture (HPCA), pages 79-90, Feb. 2003.
11. R. Joseph, Z. Hu, and M. Martonosi. Wavelet analysis for microprocessor design: Experiences with wavelet-based dI/ dt characterization. In Tenth International Symposium on High Performance Computer Architecture (HPCA), Feb. 2004.
12. H. Kim, D. M. H. Walker, and D. Colby. A practical built-in current sensor for IDDQ testing. In IEEE International Test Conference, pages 405-414, 2001.
13. M. D. Pant, P. Pant, and D. S. Wills. On-chip decoupling capacitor optimization using architectural level prediction. IEEE Transactions on VLSI Systems, 10(3):319-326, 2002.
14. M. D. Powell and T. N. Vijaykumar. Pipeline damping: A microarchitectural technique to reduce inductive noise. In Proceedings of the 30th International Symposium on Computer Architecture (ISCA 30), June 2003.
15. M. D. Powell and T. N. Vijaykumar. Pipeline muffling and a-priori current ramping: Architectural techniques to reduce high-frequency inductive noise. In Proceedings of the International Symposium on Low Power Electronics and Design, pages 223-228, Aug. 2003.
16. J. M. Rabaey, A. Chandrakasan, and B. Nikolic. Digital Integrated Circuits. Prentice Hall, 2002.
17. SIA. International Technology Roadmap for Semiconductors (ITRS). http://public.itrs.net/, 2003.
18. M. Tsuk, R. Dame, D. Dvorscak, C. Houghton, and J. S. Laurent. Modeling and measurement of the alpha 21364 package. In IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging, pages 283-286, 2001.
19. J. P. M. van Lammeren. Iccq: A test method for analogue vlsi based on current monitoring. In IEEE International Workshop on IDDQ Testing, pages 24-28, 1997.
20. B. Wicht, D. Schmitt-Landsiedel, and S. Paul. A simple low voltage current sense amplifier with switchable input transistor. In 27th European Solid-State Circuits Conference, Sept. 2001.