Microarchitectural floorplanning under performance and thermal tradeoff

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Healy, Michael ^a   Vittes, Mario ^a   Ekpanyapong, Mongkol ^a   Ballapuram, Chinnakrishnan ^a   Lim, Sung Kyu ^a   Lee, Hsien Hsin S ^a   Loh, Gabriel H ^b  

^a Birck Nanotechnology Center School of Electrical and Computer Engineering   (United States)

^b Georgia Institute of Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH RELIABILITY PROCESSORS; MICROARCHITECTURAL FLOORPLANNING ALGORITHM; MULTI OBJECTIVE HYBRID FLOORPLANNING; THERMAL RELIABILITY;

COMPUTER ARCHITECTURE; LINEAR PROGRAMMING; PROGRAM PROCESSORS; RELIABILITY; SIMULATED ANNEALING;

ALGORITHMS;

EID: 34047186502     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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