Enhancement of fault injection techniques based on the modification of VHDL code

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 16, Issue 6, 2008, Pages 693-706

  Baraza, Juan Carlos ^b   Gracia, Joaquín ^b   Blanc, Sara ^b   Gil, Daniel ^b   Gil, Pedro J ^a,b  

^a IEEE

^b UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

Dependability validation; Fault tolerance; Hardware description languages (HDLs); Logic design; Mutants; Physical faults; Saboteurs; VHDL based fault injection; VLSI

Indexed keywords

CODES (SYMBOLS); FAULT TOLERANCE; LOGIC DESIGN; VLSI CIRCUITS;

DEPENDABILITY VALIDATION; FAULT INJECTION; MUTANTS; PHYSICAL FAULTS; SABOTEURS;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 44249102333     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2000254     Document Type: Conference Paper

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