Bit flip injection in processor-based architectures: A case study

Proceedings of the 8th IEEE International On-Line Testing Workshop, IOLTW 2002

Volumn , Issue , 2002, Pages 117-127

  Cardarilli, G C ^a   Kaddour, F ^b   Leandri, A ^a   Ottavi, M ^a   Pontarelli, S ^a   Velazco, R ^b  

^a UNIVERSITY OF ROME TOR VERGATA   (Italy)

^b TIMA LABORATORY   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; ERRORS;

8-BIT MICROPROCESSORS; BEHAVIORAL LEVEL; BENCHMARK PROGRAMS; BIT-FLIPS; DIGITAL ARCHITECTURE; ERROR RATE; GROUND TESTING; HARDWARE ARCHITECTURE;

COMPUTER ARCHITECTURE;

EID: 84962664102     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2002.1030194     Document Type: Conference Paper

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