Tri-gate bulk MOSFET design for CMOS scaling to the end of the roadmap

IEEE Electron Device Letters

Volumn 29, Issue 5, 2008, Pages 491-493

  Sun, Xin ^a   Lu, Qiang ^b   Moroz, Victor ^b   Takeuchi, Hideki ^c   Gebara, Gabriel ^c   Wetzel, Jeffrey ^c   Ikeda, Shuji ^c   Shin, Changhwan ^a   King Liu, Tsu Jae ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b SYNOPSYS INC   (United States)

^c Advanced Technology Development Facility   (United States)

Author keywords

MOSFET; Multi gate FET; Scalability; Variability

Indexed keywords

ASPECT RATIO; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; SCALABILITY; THRESHOLD VOLTAGE;

VARIABILITY;

MOSFET DEVICES;

EID: 43549116825     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.919795     Document Type: Article

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