Challenge: Variability characterization and modeling for 65- To 90-nm processes

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 593-599

  Masuda, Hiroo ^a   Ohkawa, Shin Ichi ^a   Kurokawa, Atsushi ^a   Aoki, Masakazu ^b  

^a SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER   (Japan)

^b TOKYO UNIVERSITY OF SCIENCE   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; MATHEMATICAL MODELS; SEMICONDUCTOR DEVICE MANUFACTURE; STATISTICAL METHODS;

CIRCUIT PROPAGATION DELAY; VARIABILITY CHARACTERIZATION;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 33847144137     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568738     Document Type: Conference Paper

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