Design of low power & reliable networks on chip through joint crosstalk avoidance and multiple error correction coding

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 24, Issue 1-3, 2008, Pages 67-81

  Ganguly, Amlan ^a   Pande, Partha Pratim ^a   Belzer, Benjamin ^a   Grecu, Cristian ^b  

^a Washington State University   (United States)

^b UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

Crosstalk avoidance; Joint codes; Low power; Multiple error correction; Network on Chip; Transient errors

Indexed keywords

CODES (SYMBOLS); CROSSTALK; ERROR CORRECTION; POWER CONTROL; RELIABILITY THEORY;

CROSSTALK AVOIDANCE; JOINT CODES; MULTIPLE ERROR CORRECTION; NETWORK ON CHIP; TRANSIENT ERRORS;

INTEGRATED CIRCUIT TESTING;

EID: 40949110161     PISSN: 09238174     EISSN: 15730727     Source Type: Journal    
DOI: 10.1007/s10836-007-5035-1     Document Type: Conference Paper

References (32)

1. R SAN under Self-Similar Traffic. Proceedings of 13th International and 10th Symposium on Parallel and Distributed Processing 143-147, April 12-16th
2. Benini L, De Micheli G (2002) Networks on Chips: A New SoC Paradigm. IEEE Computer 70-78, Jan
3. Benini L, Bertozzi D (2004) Xpipes: A Network-on-Chip Architecture for Gigascale Systems-on-Chip. IEEE Circuits Syst Mag 4(2):18-31, Apr-June
4. Bertozzi D, Benini L, De Micheli G (2002) Low power error resilient encoding for on-chip data buses. Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, (DATE) 102-109, 4-8 March
5. Bertozzi D, Benini L, De Micheli G (2005) Error Control Schemes for On-Chip Communication Links: The Energy-Reliability Tradeoff. IEEE Trans Comput-Aided Des Integr Circuits Syst 24(6):818-831, June
6. Duato J, Yalamanchili S, Ni L (2002) Interconnection Networks - An Engineering Approach, Morgan Kaufmann
7. Dupont E, Nicolaidis M, Rohr P (2002) Embedded Robustness IPs for Transient-Error-Free ICs. IEEE Des Test Comput 19(3):54-68, May-June
8. Grecu C, Pande PP, Ivanov A, Saleh R (2004) A Scalable Communication-Centric SoC Interconnect Architecture", Proceedings of IEEE International Symposium on Quality Electronic Design, ISQED 343-348
9. Grecu C, Pande PP, Ivanov A, Saleh R (2005) Timing Analysis of Network on Chip Architectures for MP-SoC Platforms. Microelectron J Elsevier 36(9):833-845
10. ITRS (2005) Documents, http://www.itrs.net/Links/2005ITRS/Home2005.htm
11. Kretzschmar C, Nieuwland AK, Muller D (2004) Why Transition Coding for Power Minimization of on-Chip Buses does not work. Proceedings of the Design, Automation and Test in Europe Conference and Exhibition 512-517, 16-20 Feb
12. Lin S, Costello DJ (1983) Error Control Coding: Fundamentals and Applications, Prentice-Hall
13. Magarshack P, Paulin PG (2003) System-on-Chip beyond the Nanometer Wall. Proceedings of 40th Design Automation Conf. (DAC 03), ACM Press, pp 419-424
14. McWilliams FJ (1963) A Theorem on the Distribution of Weights in a Systematic Code. Bell Syst Tech Jour 42:79-94
15. Mitra S, Seifert N, Zhang M, Shi Q, Kim KS (2005) Robust System Design with Built-In Soft Error Resilience. IEEE Computer 38(2):43-52, Feb
16. Murali S, De Micheli G, Benini L, Theocharides T, Vijaykrishnan N, Irwin M (2005) Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des Test Comput 22(5):434-442
17. Pande PP, Ganguly A, Feero B, Belzer B, Grecu C (2006) Design of Low power & Reliable Networks on Chip through Joint Crosstalk Avoidance and Forward Error Correction Coding. Proceedings of 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 06), 4th-6th October
18. Pande PP, Grecu C, Jones M, Ivanov A, Saleh R (2005) Performance Evaluation and Design Trade-offs for Network on Chip Interconnect Architectures. IEEE Trans Comput 54(8):1025-1040, August
19. Pande PP, Zhu H, Ganguly A, Grecu C (2006) Crosstalk-aware Energy Reduction in NoC Communication Fabrics. Proceedings of IEEE International SOC Conference, SOCC 2006 225-228, 24th-27th September
20. Pande PP, Zhu H, Ganguly A, Grecu C (2006) Energy Reduction through Crosstalk Avoidance Coding in NoC Paradigm. Proceedings of 9th Euromicro Conference on Digital System Design, DSD 2006, 30th August-1st
21. Park K, Willinger W (2000) Self-similar Network Traffic and Performance Evaluation, John Wiley & Sons
22. Patel KN, Markov IL (2003) Error-Correction and Crosstalk Avoidance in DSM Busses," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Special Issue for System Level Interconnect Prediction (SLIP) 1-5
23. Rossi D et al (2002) Coding scheme for low energy consumption fault-tolerant bus. Proceedings of 8th IEEE International On-Line Testing Workshop 8-12
24. Rossi D et al (2003) Power Consumption of Fault Tolerant Codes: the Active Elements. Proceedings of 9th IEEE International On-Line Testing Symposium 61-67
25. Rossi D, Metra C, Nieuwland AK, Katoch A (2005) Exploiting ECC Redundancy to Minimize Crosstalk Impact. IEEE Des Test Comput 22(1):59-70, Jan
26. Rossi D, Metra C, Nieuwland AK, Katoch A (2005) New ECC for Crosstalk Effect Minimization. IEEE Des Test Comput 22(4):340-348, July-Aug
27. Shang L, Peh LS, Jha NK (2003) Dynamic voltage scaling with links for power optimization of interconnection networks. Proceedings of the 9th International Symposium on High Performance Computer Architecture (HPCA-9) 91-102, 8-12 Feb
28. Soteriou V, LS Peh (2004) Design-space exploration of power-aware on/off interconnection networks. Proceedings of IEEE International Conference on Computer Design (ICCD) 510-517, 11-13 Oct
29. Sotiriadis PP, Chandrakasan AP (2002) A bus energy model for deep submicron technology. IEEE Trans Very Large Scale Integr (VLSI) Syst 10(3):341-350, June
30. Sridhara SR, Shanbhag NR (2005) Coding for System-on-Chip Networks: A Unified Framework. IEEE Trans Very Large Scale Integr (TVLSI) Syst 13(6):655-667, June
31. Stan MR, Burleson WP (1997) Low-power encodings for global communication in CMOS VLSI. IEEE Trans Very Large Scale Integr (TVLSI) Syst 5(4):444-455, Dec
32. Victor B, Keutzer K (2001) Bus Encoding to Prevent Crosstalk Delay. Proceedings of IEEE International conference on Computer Aided Design (ICCAD) 57-63, 4-8 Nov