-
1
-
-
0036857007
-
StepNP: A system-level exploration platform for network processors
-
Nov.
-
P. G. Paulin, C. Pilkington, E. Bensoudane, "StepNP: A System-Level Exploration Platform for Network Processors", IEEE Design & Test of Computers, vol. 19, no.6, Nov. 2002.
-
(2002)
IEEE Design & Test of Computers
, vol.19
, Issue.6
-
-
Paulin, P.G.1
Pilkington, C.2
Bensoudane, E.3
-
2
-
-
0041694008
-
StepNP: A driver for multi-processor SOC tools
-
Chamonix, July
-
P. G. Paulin, "StepNP: A Driver for Multi-processor SoC tools", Presentation at the Multi-Processor SoC Seminar, Chamonix, July 2003. See http://tima.imag.fr/mpsoc.
-
(2003)
Presentation at the Multi-processor SoC Seminar
-
-
Paulin, P.G.1
-
3
-
-
0043196871
-
A multi-context 6.4Gbps/channel on-chip communication network using 0.18um flash-EEPROM switches and elastic interconnects
-
San Francisco, Feb.
-
M. Borgatti et al, "A Multi-Context 6.4Gbps/Channel On-Chip Communication Network using 0.18um Flash-EEPROM Switches and Elastic Interconnects", Proc. of ISSC, San Francisco, Feb. 2003.
-
(2003)
Proc. of ISSC
-
-
Borgatti, M.1
-
4
-
-
0042194657
-
A 0.l8um, 1GOPS reconfigurable signal processing IC with embedded FPGA and 1.2GB/S, 3-port flash memory subsystem
-
San Francisco, Feb.
-
M. Borgatti et al, "A 0.l8um, 1GOPS Reconfigurable Signal Processing IC with embedded FPGA and 1.2GB/S, 3-Port Flash Memory Subsystem", Proc. of Intl. Solid-State Circuits Conference (ISSC), San Francisco, Feb. 2003.
-
(2003)
Proc. of Intl. Solid-state Circuits Conference (ISSC)
-
-
Borgatti, M.1
-
5
-
-
0141426704
-
An application specific embeddable flash memory system for non-volatile storage of code, data and bit-streams for embedded FPGA configurations
-
Kyoto, June
-
M. Pasotti et al, "An Application Specific Embeddable Flash Memory System for Non-Volatile Storage of Code, Data and Bit-Streams for Embedded FPGA Configurations", Proc. of Symposium on VLSI Circuits, Kyoto, June 2003.
-
(2003)
Proc. of Symposium on VLSI Circuits
-
-
Pasotti, M.1
-
6
-
-
0036645653
-
FlexWare: A retargetable embedded-software development environment
-
July
-
P. G. Paulin and M. Santana, "FlexWare: A Retargetable Embedded-Software Development Environment," IEEE Design & Test of Computers, vol. 19, no. 4, July 2002.
-
(2002)
IEEE Design & Test of Computers
, vol.19
, Issue.4
-
-
Paulin, P.G.1
Santana, M.2
-
7
-
-
0011904925
-
Towards bridging the gap between SoC transactional and cycle-accurate levels
-
A. Clouard et al., "Towards Bridging the Gap between SoC Transactional and Cycle-Accurate Levels," Proc. Design, Automation, and Test in Europe-Designer Forum, 2002, pp. 22-29.
-
(2002)
Proc. Design, Automation, and Test in Europe-designer Forum
, pp. 22-29
-
-
Clouard, A.1
-
8
-
-
84859967419
-
SPIN: A scalable, packet-switched, on-chip micro-network
-
Munich, March
-
A. Greiner et al, "SPIN: a Scalable, Packet-switched, On-chip Micro-network, Proc. of Design Automation and Test in Europe (Designer Forum), Munich, March 2003.
-
(2003)
Proc. of Design Automation and Test in Europe (Designer Forum)
-
-
Greiner, A.1
-
10
-
-
0041693948
-
Using transactional level models in a SoC design flow
-
eds. W. Muller, W. Rosentiel, J. Ruf, Kluwer Academic Publishers
-
A. Clouard, K. Jain, F. Ghenassia, L. Maillet-Contoz, J.-P. Strassen, "Using Transactional Level Models in a SoC Design Flow", in "SystemC Methodologies and Applications", eds. W. Muller, W. Rosentiel, J. Ruf, Kluwer Academic Publishers, 2003.
-
(2003)
SystemC Methodologies and Applications
-
-
Clouard, A.1
Jain, K.2
Ghenassia, F.3
Maillet-Contoz, L.4
Strassen, J.-P.5
-
11
-
-
0041693950
-
-
See OCP-IP web site: http://www.ocpip.org.
-
-
-
-
12
-
-
0036149420
-
Networks on chip: A new SoC paradigm
-
Jan.
-
L. Benini and G. De Micheli, "Networks on Chip: A New SoC Paradigm," Computer, vol. 35, no. 1, Jan. 2002.
-
(2002)
Computer
, vol.35
, Issue.1
-
-
Benini, L.1
De Micheli, G.2
-
14
-
-
0042194656
-
Trends and requirements for network processor SoC tools
-
Pizay, June
-
P. G. Paulin, "Trends and Requirements for Network Processor SoC Tools", Presentation at Multi-Processor SoC Seminar, Pizay, June 2002. See http://tima.imag.fr/mpsoc/2002/slides/paulin02.pdf
-
(2002)
Presentation at Multi-processor SoC Seminar
-
-
Paulin, P.G.1
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