Power consumption of fault tolerant codes: The active elements

Proceedings - 9th IEEE International On-Line Testing Symposium, IOLTS 2003

Volumn , Issue , 2003, Pages 61-67

  Rossi, D ^a   Van Dijk, V E S ^b   Kleihorst, R P ^b   Nieuwland, A K ^b   Metra, C ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Circuit faults; CMOS technology; Crosstalk; Delay; Encoding; Energy consumption; Fault tolerance; Integrated circuit interconnections; Power supplies; Wires

Indexed keywords

CMOS INTEGRATED CIRCUITS; CODES (SYMBOLS); CROSSTALK; ELECTRIC POWER SYSTEM INTERCONNECTION; ELECTRIC POWER UTILIZATION; ENCODING (SYMBOLS); ENERGY UTILIZATION; FAULT TOLERANCE; MICROPROCESSOR CHIPS; WIRE;

CIRCUIT FAULTS; CMOS TECHNOLOGY; DELAY; INTEGRATED CIRCUIT INTERCONNECTIONS; POWER SUPPLY;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 84944029675     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2003.1214368     Document Type: Conference Paper

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