Case study and efficient modelling for variational chemical-mechanical planarisation

IET Circuits, Devices and Systems

Volumn 2, Issue 1, 2008, Pages 30-36

  Zhang, X ^a   He, L ^a   Gerousis, V ^b   Song, L ^b   Teng, C C ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIELECTRIC PROPERTIES; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; TUNGSTEN;

DIELECTRIC THICKNESSES; METAL FEATURE DENSITY; MICROPROCESSOR HARDCORE;

CHEMICAL MECHANICAL POLISHING;

EID: 40349088972     PISSN: 1751858X     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cds:20070187     Document Type: Article

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