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Volumn , Issue , 2007, Pages 31-36

Dummy fill aware buffer insertion during routing

Author keywords

Buffer insertion; DFM; Dummy fill; Routing; VLSI

Indexed keywords

ALGORITHMS; CAPACITANCE; NETWORK ROUTING; OPTIMIZATION; VIRTUAL REALITY; VLSI CIRCUITS;

EID: 34748838914     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228798     Document Type: Conference Paper
Times cited : (2)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.