Area fill generation with inherent data volume reduction

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2003, Pages 868-873

  Chen, Yu ^a   Kahng, Andrew B ^b   Robins, Gabriel ^c   Zelikovsky, Alexander ^d   Zheng, Yuhong ^e  

^a University of California   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c University of Virginia   (United States)

^d GEORGIA STATE UNIVERSITY   (United States)

^e UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAY REFERENCES; CHEMICAL-MECHANICAL PLANARIZATION; FEATURE DENSITY; FILLING SOLUTIONS; LOW K DIELECTRICS; MANUFACTURABILITY; OPTIMIZATION TECHNIQUES; VLSI MANUFACTURING;

DATA COMPRESSION;

EXHIBITIONS;

EID: 23744508252     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253715     Document Type: Conference Paper

References (12)

1. D. Boning, B. Lee, T. Tugbawa, and T. Park, Models for Pattern Dependencies: Capturing Effects in Oxide, STI, and Copper CMP, Semicon/West Tech. Symp.: CMP Tech. for ULSI Manuf., July 2001
2. P. Buck (Dupont Photomasks), personal communication, International Sematech Mask-EDA Workshop, July 2001
3. Y. Chen, A.B. Kahng, G. Robins and A. Zelikovsky, New Monte-Carlo Algorithms for Layout Density Control, Proc. ASP-DAC, 2000, pp. 523-528
4. Y. Chen, A.B. Kahng, G. Robins and A. Zelikovsky, Practical Iterated Fill Synthesis for CMP Uniformity, Proc. ACM/IEEE Design Automation Conf., Los Angeles, June 2000, pp. 671-674
5. Y. Chen, A.B. Kahng, G. Robins and A. Zelikovsky, Hierarchical Dummy Fill for Process Uniformity, Proc. ASP-DAC, Jan. 2001, pp.139-144
6. V. Dai and A. Zakhor, Lossless Layout Compression for Maskless Lithography Systems, Proc. Emerging Lithographic Technologies IV, Santa Clara, February 2000, SPIE Volume 3997, pp. 467-477
7. R. Ellis, A.B. Kahng, Y. Zheng, JBIG Compression Algorithms for Dummy Fill VLSI Layout Data, technical report #CS2002-0709, UCSD CSE Department, June 2002
8. A.B. Kahng, G. Robins, A. Singh, H. Wang and A. Zelikovsky, Filling Algorithms and Analyses for Layout Density Control, IEEE Trans. Computer-Aided Design 18(4) (1999), pp. 445-462
9. F.M. Schellenberg, L. Capodieci and B. Socha, Adoption of OPC and the Impact on Design and Layout, Proc. ACM/IEEE Design Automation Conf., Las Vegas, June 2001, pp. 89-92
10. R. Tian, D. Wong, and R. Boone, Model-Based Dummy Feature Placement for Oxide Chemical Mechanical Polishing Manufacturability, Proc. ACM/IEEE 2Design Automation Conf., June 2000, pp. 667-670
11. R. Tian, X. Tang and D.F. Wong, Dummy feature placement for chemical-mechanical polishing uniformity in a shallow trench isolation process , Proc. ACM/IEEE International Symposium on Physical Design, April 2001, pp. 118-123
12. S. Ueki, I. Ashida, and H. Kawahira, Effective data compaction algorithm for vector scan EB writing system, 20th Annual BACUS Symposium on Photomask Technology, Monterey, CA, Sept. 2000, pp. 589-600