-
1
-
-
0033682012
-
An exhaustive method for characterizing the interconnect capacitance considering the floating dummy-fills by employing an efficient field solving algorithm in intl
-
J.-K. Park, K.-H. Lee, J.-H. Lee and Y.-K. Park. An Exhaustive Method for Characterizing the Interconnect Capacitance Considering the Floating Dummy-Fills by Employing an Efficient Field Solving Algorithm In Intl. Conf. on SISPAD, pages 98-101, 2000.
-
(2000)
Conf. on SISPAD
, pp. 98-101
-
-
Park, J.-K.1
Lee, K.-H.2
Lee, J.-H.3
Park, Y.-K.4
-
2
-
-
0003156497
-
Chemical mechanical polishing of interlayer dielectric: A review
-
I. Ali, S. Roy and G. Shinn. Chemical Mechanical Polishing of Interlayer Dielectric: A Review. In Solid State Technol., volume 37, pages 63-70, 1994.
-
(1994)
Solid State Technol
, vol.37
, pp. 63-70
-
-
Ali, I.1
Roy, S.2
Shinn, G.3
-
6
-
-
0035716853
-
Analyzing the effects of floating dummy-fills: From feature scale analysis to full-chip rc extraction
-
K.-H. Lee, J.-K. Park, Y.-N. Yoon, D.-H. Jung, J.-P. Shin, Y.-K. Park and J. T Kong. Analyzing the Effects of Floating Dummy-Fills: From Feature Scale Analysis to Full-Chip RC Extraction. In IEDM Tech. Dig., pages 685-688, 2001.
-
(2001)
IEDM Tech. Dig.
, pp. 685-688
-
-
Lee, K.-H.1
Park, J.-K.2
Yoon, Y.-N.3
Jung, D.-H.4
Shin, J.-P.5
Park, Y.-K.6
Kong, J.T.7
-
7
-
-
84942123552
-
Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling
-
W.-S. Lee, K.-H. Lee, J.-K. Park, T.-K. Kim and Y.-K. Park. Investigation of the Capacitance Deviation due to Metal-Fills and the Effective Interconnect Geometry Modeling. In Intl. Symp. on Quality Electronic Design, page 354, 2003.
-
(2003)
Intl. Symp. on Quality Electronic Design
, pp. 354
-
-
Lee, W.-S.1
Lee, K.-H.2
Park, J.-K.3
Kim, T.-K.4
Park, Y.-K.5
-
8
-
-
0032028732
-
The physical and electrical effects of metal-fill patterning practices for oxide chemical-mechanical polishing processes
-
B. Stine, D. Boning, J. Chung and L. Camilletti. The Physical and Electrical Effects of Metal-fill Patterning Practices for Oxide Chemical-Mechanical Polishing Processes. In IEEE Trans. on Electron Devices, volume 45, pages 665-679, 1998.
-
(1998)
IEEE Trans. on Electron Devices, Volume 45
, pp. 665-679
-
-
Stine, B.1
Boning, D.2
Chung, J.3
Camilletti, L.4
-
9
-
-
0032000527
-
Rapid characterization and modeling of pattern dependent variation in chemical-mechanical polishing
-
B. Stine, D. Ouma, R. Divecha, D. S. Bonings, J. Chung, D. Hertherington, C. R. Harwood, O. S. Nakagawa and S.-Y. Oh. Rapid Characterization and Modeling of Pattern Dependent Variation in Chemical-Mechanical Polishing. In IEEE Trans. Semiconductor Manufacturing, volume 11, pages 129-140, 1998.
-
(1998)
IEEE Trans. Semiconductor Manufacturing
, vol.11
, pp. 129-140
-
-
Stine, B.1
Ouma, D.2
Divecha, R.3
Bonings, D.S.4
Chung, J.5
Hertherington, D.6
Harwood, C.R.7
Nakagawa, O.S.8
Oh, S.-Y.9
-
10
-
-
84886703433
-
Dummy filling methods for reducing interconnect capacitance and number of fills
-
A. Kurokawa, T. Kanamoto, T. Ibe, A. Kasebe, C. W. Fong, T. Kage, Y. Inoue and H. Masuda Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. In Intl. Symp. on Quality Electrocnics Design, pages 586-591, 2005.
-
(2005)
Intl. Symp. on Quality Electrocnics Design
, pp. 586-591
-
-
Kurokawa, A.1
Kanamoto, T.2
Ibe, T.3
Kasebe, A.4
Fong, C.W.5
Kage, T.6
Inoue, Y.7
Masuda, H.8
-
11
-
-
17044386168
-
Efficient capacitance extraction method for interconnects with dummy fills
-
A. Kurokawa, T. Kanamoto, A. Kasebe, Y. Inoue and H. Masuda Efficient Capacitance Extraction Method for Interconnects with Dummy Fills. In Custom Integrated Circuits Conference, pages 485-488, 2004.
-
(2004)
Custom Integrated Circuits Conference
, pp. 485-488
-
-
Kurokawa, A.1
Kanamoto, T.2
Kasebe, A.3
Inoue, Y.4
Masuda, H.5
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