Optimizing radiation hard by design SRAM cells

IEEE Transactions on Nuclear Science

Volumn 54, Issue 6, 2007, Pages 2028-2036

  Clark, Lawrence T ^a,b   Mohr, Karl C ^a,b   Holbert, Keith E ^a,b   Yao, Xiaoyin ^b   Knudsen, Jonathan ^b,c   Shah, Harshit ^a,b,d  

^a IEEE   (United States)

^b AZ 85281   (United States)

^c ADVANCED MICRO DEVICES   (United States)

^d Freescale   (United States)

Author keywords

Integrated circuit radiation effects; Radiation hardening; SRAM

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; RADIATION EFFECTS; RADIATION HARDENING; TRANSISTORS;

NMOS ACCESS TRANSISTORS; SRAM ARRAYS; TID EXPERIMENTS;

STATIC RANDOM ACCESS STORAGE;

EID: 37249043765     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2007.909482     Document Type: Conference Paper

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