A single-Vt low-leakage gated-ground cache for deep submicron

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 2, 2003, Pages 319-328

  Agarwal, Amit ^a   Li, Hai ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Gated Ground; Low leakage cache; Low power; SRAM

Indexed keywords

BUFFER STORAGE; COMPUTER SIMULATION; GATES (TRANSISTOR); MOSFET DEVICES; THRESHOLD VOLTAGE; TRANSISTORS;

GATED-GROUND TRANSISTORS;

INTEGRATED CIRCUITS;

EID: 0037321205     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.807414     Document Type: Article

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