-
1
-
-
10444270913
-
A 132-Gb/s 4:1 multiplexer in 0.13-μm SiGe-bipolar technology
-
Dec
-
M. Meghelli, "A 132-Gb/s 4:1 multiplexer in 0.13-μm SiGe-bipolar technology," IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2403-2407, Dec. 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.12
, pp. 2403-2407
-
-
Meghelli, M.1
-
2
-
-
33749512228
-
A 165-Gb/s 4:1 multiplexer in InP DHBT technology
-
Oct
-
J. Hallin, T. Kjellberg, and T. Swahn, "A 165-Gb/s 4:1 multiplexer in InP DHBT technology," IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2209-2214, Oct. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.10
, pp. 2209-2214
-
-
Hallin, J.1
Kjellberg, T.2
Swahn, T.3
-
3
-
-
33749526342
-
InP DHBT-based monolithically integrated CDR/DEMUX IC operating at 80 Gbit/s
-
Oct
-
R. E. Makon, R. Driad, K. Schneider, M. Ludwig, R. Aidam, R. Quay, M. Schlechtweg, and G. Weimann, "InP DHBT-based monolithically integrated CDR/DEMUX IC operating at 80 Gbit/s," IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2215-2223, Oct. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.10
, pp. 2215-2223
-
-
Makon, R.E.1
Driad, R.2
Schneider, K.3
Ludwig, M.4
Aidam, R.5
Quay, R.6
Schlechtweg, M.7
Weimann, G.8
-
4
-
-
2442651367
-
An 800 mW 10 Gb Ethernet transceiver in 0.13 μm CMOS
-
S. Sidiropoulos, N. Acharya, P. Chau, J. Dao, A. Feldman, H.-J. Liaw, M. Loinaz, R. S. Narayanaswami, C. Portmann, S. Rabii, A. Salleh, S. Sheth, L. Thon, K. Vleugels, P. Yue, and D. Stark, "An 800 mW 10 Gb Ethernet transceiver in 0.13 μm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2004, pp. 168-169.
-
(2004)
IEEE ISSCC Dig. Tech. Papers
, pp. 168-169
-
-
Sidiropoulos, S.1
Acharya, N.2
Chau, P.3
Dao, J.4
Feldman, A.5
Liaw, H.-J.6
Loinaz, M.7
Narayanaswami, R.S.8
Portmann, C.9
Rabii, S.10
Salleh, A.11
Sheth, S.12
Thon, L.13
Vleugels, K.14
Yue, P.15
Stark, D.16
-
5
-
-
18744416335
-
A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic
-
Apr
-
T. O. Dickson, R. Beerkens, and S. P. Voinigescu, "A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 994-1003, Apr. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.4
, pp. 994-1003
-
-
Dickson, T.O.1
Beerkens, R.2
Voinigescu, S.P.3
-
6
-
-
0031553235
-
Application of merged current switch logic for a built-in logic block observer operating at 1 Gbit/s and 1.2 V supply
-
Dec
-
O. Kromat and U. Langmann, "Application of merged current switch logic for a built-in logic block observer operating at 1 Gbit/s and 1.2 V supply," Electron. Lett., pp. 2111-2113, Dec. 1997.
-
(1997)
Electron. Lett
, pp. 2111-2113
-
-
Kromat, O.1
Langmann, U.2
-
7
-
-
34748872382
-
Advanced SiGe BiCMOS and CMOS platforms for optical and millimeter-wave integrated circuits
-
P. Chevalier, D. Gloria, P. Scheer, S. P. Voinigescu, T. O. Dickson, E. Laskin, S. T. Nicolson, T. Chalvatzis, K. H. K. Yau, S. Pravost, F. Gianesello, F. Pourchon, P. Garcia, J.-C. Vildeuil, A. Chantre, C. Garnier, and O. Noblanc, "Advanced SiGe BiCMOS and CMOS platforms for optical and millimeter-wave integrated circuits," in IEEE Compound Semiconductor IC Symp. Tech. Dig., 2006, pp. 12-15.
-
(2006)
IEEE Compound Semiconductor IC Symp. Tech. Dig
, pp. 12-15
-
-
Chevalier, P.1
Gloria, D.2
Scheer, P.3
Voinigescu, S.P.4
Dickson, T.O.5
Laskin, E.6
Nicolson, S.T.7
Chalvatzis, T.8
Yau, K.H.K.9
Pravost, S.10
Gianesello, F.11
Pourchon, F.12
Garcia, P.13
Vildeuil, J.-C.14
Chantre, A.15
Garnier, C.16
Noblanc, O.17
-
8
-
-
0028385097
-
Design techniques for low-voltage high-speed digital bipolar circuits
-
Mar
-
B. Razavi, Y. Ota, and R. G. Schwartz, "Design techniques for low-voltage high-speed digital bipolar circuits," IEEE J. Solid-State Circuits, vol. 29, no. 3, pp. 332-339, Mar. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, Issue.3
, pp. 332-339
-
-
Razavi, B.1
Ota, Y.2
Schwartz, R.G.3
-
9
-
-
12344308463
-
30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits
-
Jan
-
T. O. Dickson, M.-A. LaCroix, S. Boret, D. Gloria, R. Beerkens, and S. P. Voinigescu, "30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits," IEEE Trans. Microw. Theory Tech., vol. 53, no. 1, pp. 123-133, Jan. 2005.
-
(2005)
IEEE Trans. Microw. Theory Tech
, vol.53
, Issue.1
, pp. 123-133
-
-
Dickson, T.O.1
LaCroix, M.-A.2
Boret, S.3
Gloria, D.4
Beerkens, R.5
Voinigescu, S.P.6
-
11
-
-
0035309451
-
Stacked inductors and transformers in CMOS technology
-
Apr
-
A. Zolfaghari, A. Chan, and B. Razavi, "Stacked inductors and transformers in CMOS technology," IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, Apr. 2001.
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, Issue.4
, pp. 620-628
-
-
Zolfaghari, A.1
Chan, A.2
Razavi, B.3
-
12
-
-
33749524068
-
A 60 mW per lane, 4 × 23-Gb/s 27-l PRBS generator
-
Oct
-
E. Laskin and S. P. Voinigescu, "A 60 mW per lane, 4 × 23-Gb/s 27-l PRBS generator," IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2198-2208, Oct. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.10
, pp. 2198-2208
-
-
Laskin, E.1
Voinigescu, S.P.2
-
13
-
-
0346935199
-
1.5-V low supply voltage 43-Gb/s delayed flip-flop circuit
-
Y. Amamiya, Y. Suzuki, J. Yamazaki, A. Fujihara, S. Tanaka, and H. Hida, "1.5-V low supply voltage 43-Gb/s delayed flip-flop circuit," in IEEE GaAs IC Symp. Tech. Dig., 2003, pp. 169-172.
-
(2003)
IEEE GaAs IC Symp. Tech. Dig
, pp. 169-172
-
-
Amamiya, Y.1
Suzuki, Y.2
Yamazaki, J.3
Fujihara, A.4
Tanaka, S.5
Hida, H.6
-
14
-
-
33746927173
-
The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS high-speed building blocks
-
Aug
-
T. O. Dickson, K. H. K. Yau, T. Chalvatzis, A. M. Mangan, E. Laskin, R. Beerkens, P. Westergaard, M. Tazlauanu, M.-T. Yang, and S. P. Voinigescu, "The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS high-speed building blocks," IEEE J. Solid-State Circuits, vol. 41, no. 8, pp. 1830-1845, Aug. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.8
, pp. 1830-1845
-
-
Dickson, T.O.1
Yau, K.H.K.2
Chalvatzis, T.3
Mangan, A.M.4
Laskin, E.5
Beerkens, R.6
Westergaard, P.7
Tazlauanu, M.8
Yang, M.-T.9
Voinigescu, S.P.10
-
15
-
-
0037319508
-
Millimeter-wave VCOs with wide tuning range and low phase noise, fully integrated in a SiGe bipolar production technology
-
Feb
-
H. Li and H.-M. Rein, "Millimeter-wave VCOs with wide tuning range and low phase noise, fully integrated in a SiGe bipolar production technology," IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 184-191, Feb. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.2
, pp. 184-191
-
-
Li, H.1
Rein, H.-M.2
-
16
-
-
39049159991
-
Design and scaling of SiGe BiCMOS VCOs above 100 GHz
-
S. T. Nicolson, K. H. K. Yau, K. A. Tang, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, "Design and scaling of SiGe BiCMOS VCOs above 100 GHz," in Proc. IEEE BCTM, 2006, pp. 142-145.
-
(2006)
Proc. IEEE BCTM
, pp. 142-145
-
-
Nicolson, S.T.1
Yau, K.H.K.2
Tang, K.A.3
Chevalier, P.4
Chantre, A.5
Sautreuil, B.6
Voinigescu, S.P.7
-
17
-
-
34548838861
-
40 GHz wide-locking-range regenerative frequency divider and low-phase-noise balanced VCO in 0.18 μm CMOS
-
J.-C. Chien and L.-H. Lu, "40 GHz wide-locking-range regenerative frequency divider and low-phase-noise balanced VCO in 0.18 μm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2007, pp. 544-545.
-
(2007)
IEEE ISSCC Dig. Tech. Papers
, pp. 544-545
-
-
Chien, J.-C.1
Lu, L.-H.2
-
18
-
-
1042277548
-
MAX 0.13 μm SiGe:C BiCMOS technology
-
MAX 0.13 μm SiGe:C BiCMOS technology," in Proc. IEEE BCTM, 2003, pp. 199-202.
-
(2003)
Proc. IEEE BCTM
, pp. 199-202
-
-
Laurens, M.1
Martinet, B.2
Kermarrec, O.3
Campidelli, Y.4
Deleglise, F.5
Dutartre, D.6
Troillard, G.7
Gloria, D.8
Bonnouvrier, J.9
Beerkens, R.10
Rousset, V.11
Leverd, F.12
Chantre, A.13
Monroy, A.14
-
19
-
-
12344258200
-
SiGe BiCMOS 65-GHz BPSK transmitter and 30 to 122 GHz LC-varactor VCOs with up to 21% tuning range
-
C. Lee, T. Yao, A. Mangan, K. Yau, M. A. Copeland, and S. P. Voinigescu, "SiGe BiCMOS 65-GHz BPSK transmitter and 30 to 122 GHz LC-varactor VCOs with up to 21% tuning range," in IEEE Compound Semiconductor IC Symp. Tech. Dig., 2004, pp. 179-182.
-
(2004)
IEEE Compound Semiconductor IC Symp. Tech. Dig
, pp. 179-182
-
-
Lee, C.1
Yao, T.2
Mangan, A.3
Yau, K.4
Copeland, M.A.5
Voinigescu, S.P.6
-
20
-
-
33847069231
-
Model extraction of SiGe HBT noise parameters from, measured y-parameters and accounting for noise correlation
-
K. H. K. Yau and S. P. Voinigescu, "Model extraction of SiGe HBT noise parameters from, measured y-parameters and accounting for noise correlation," in Proc. 6th Topical Meeting on Silicon Monolithic ICs in RF Systems, 2006, pp. 226-229.
-
(2006)
Proc. 6th Topical Meeting on Silicon Monolithic ICs in RF Systems
, pp. 226-229
-
-
Yau, K.H.K.1
Voinigescu, S.P.2
-
21
-
-
28144448848
-
Circuit techniques for a 40 Gb/s transmitter in 0.13 μm CMOS
-
J. Kim, J.-K. Kim, B.-J. Lee, M.-S. Hwang, H.-R. Lee, S.-H. Lee, N. Kim, D.-K. Jeong, and W. Kim, "Circuit techniques for a 40 Gb/s transmitter in 0.13 μm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2005, pp. 150-151.
-
(2005)
IEEE ISSCC Dig. Tech. Papers
, pp. 150-151
-
-
Kim, J.1
Kim, J.-K.2
Lee, B.-J.3
Hwang, M.-S.4
Lee, H.-R.5
Lee, S.-H.6
Kim, N.7
Jeong, D.-K.8
Kim, W.9
-
22
-
-
0036442548
-
STS-768 multiplexer with full rate output data retimer
-
A. Hendarman, E. A. Sovero, X. Xu, and K. Witt, "STS-768 multiplexer with full rate output data retimer," in IEEE GaAs IC Symp. Tech. Dig., 2002, pp. 211-214.
-
(2002)
IEEE GaAs IC Symp. Tech. Dig
, pp. 211-214
-
-
Hendarman, A.1
Sovero, E.A.2
Xu, X.3
Witt, K.4
-
23
-
-
27844477682
-
A 43-Gb/s full-rate clock transmitter in 0.18- μm SiGe BiCMOS
-
Oct
-
M. Meghelli, "A 43-Gb/s full-rate clock transmitter in 0.18- μm SiGe BiCMOS," IEEE J. Solid-State Circuits, vol. 40, no. 10, pp. 2046-2050, Oct. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.10
, pp. 2046-2050
-
-
Meghelli, M.1
-
24
-
-
34347245193
-
Low voltage topologies for 40-Gb/s circuits in nanoscale CMOS
-
Jul
-
T. Chalvatzis, K. H. K. Yau, R. A. Aroca, P. Schvan, M.-T. Yang, and S. P. Voinigescu, "Low voltage topologies for 40-Gb/s circuits in nanoscale CMOS," IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1564-1573, Jul. 2007.
-
(2007)
IEEE J. Solid-State Circuits
, vol.42
, Issue.7
, pp. 1564-1573
-
-
Chalvatzis, T.1
Yau, K.H.K.2
Aroca, R.A.3
Schvan, P.4
Yang, M.-T.5
Voinigescu, S.P.6
-
25
-
-
18744412520
-
A 60-Gb/s 0.7-V 10-mW monolithic transformer-coupled 2:1 multiplexer in 90-nm CMOS
-
D. Kehrer and H.-D. Wohlmuth, "A 60-Gb/s 0.7-V 10-mW monolithic transformer-coupled 2:1 multiplexer in 90-nm CMOS," in IEEE Compound Semiconductor IC Symp. Tech. Dig., 2004, pp. 105-108.
-
(2004)
IEEE Compound Semiconductor IC Symp. Tech. Dig
, pp. 105-108
-
-
Kehrer, D.1
Wohlmuth, H.-D.2
-
26
-
-
20144388719
-
230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology
-
P. Chevalier, C. Fellous, L. Rubaldo, D. Dutartre, M. Laurens, T. Jagueneau, F. Levard, S. Bord, C. Richard, D. Lenoble, J. Bonnouvrier, M. Marty, A. Perrotin, D. Gloria, F. Saguin, B. Barbalat, R. Beerkens, N. Zerounian, F. Aniel, and A. Chantre, "230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology," in Proc. IEEE BCTM, 2004, pp. 225-228.
-
(2004)
Proc. IEEE BCTM
, pp. 225-228
-
-
Chevalier, P.1
Fellous, C.2
Rubaldo, L.3
Dutartre, D.4
Laurens, M.5
Jagueneau, T.6
Levard, F.7
Bord, S.8
Richard, C.9
Lenoble, D.10
Bonnouvrier, J.11
Marty, M.12
Perrotin, A.13
Gloria, D.14
Saguin, F.15
Barbalat, B.16
Beerkens, R.17
Zerounian, N.18
Aniel, F.19
Chantre, A.20
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