Circuit techniques for a 40Gb/s transmitter in 0.13μm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Kim, Jaeha ^a   Kim, Jeong Kyoum ^a   Lee, Bong Joon ^a   Hwang, Moon Sang ^a   Lee, Hyung Rok ^a   Lee, Sang Hyun ^b   Kim, Namhoon ^b   Jeong, Deog Kyoon ^b   Kim, Wonchan ^a  

^a Seoul National University   (South Korea)

^b Silicon Image Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144448848     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. T. H. Lee, "The Design of CMOS Radio-Frequency Integrated Circuits," Cambridge University Press, New York, NY, 1998.
2. S. Galal, B. Razavi, "40Gb/s Amplifier and ESD Protection Circuit in O.lSum CMOS Technology," ISSCC Dig. Tech. Papers, pp. 480-481, Feb., 2004.
3. S. Galal, B. Razavi, "10Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18μm CMOS Technology," ISSCC Dig. Tech. Papers, pp. 188-189, Feb., 2003.
4. D. Ham, A. Hajimiri, "Concepts and Methods in Optimization of Integrated LC VCOs," IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 896-909, Jun., 2001.