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1
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0742287129
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50 Gb/s 2:1 multiplexer in 0.13 μm CMOS technology
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Jan.
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D. Kehrer, H.D. Wohlmuth, M. Wurzer, and H. Knapp, "50 Gb/s 2:1 Multiplexer in 0.13 μm CMOS Technology," Electronics Letters, vol. 40, no. 02, pp. 100-101, Jan. 2004.
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Electronics Letters
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Kehrer, D.1
Wohlmuth, H.D.2
Wurzer, M.3
Knapp, H.4
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2
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2442716240
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A 25GHz clock buffer and a 50Gb/s 2:1 selector IC in 90nm CMOS
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February
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D. Yamazaki, T. Yamamoto, M. Horinka, H. Nomura, K. Hashimoto, and H. Onodera, "A 25GHz Clock Buffer and a 50Gb/s 2:1 Selector IC in 90nm CMOS," in IEEE International Solid-State Circuits Conference, February 2004, pp. 240-241.
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IEEE International Solid-state Circuits Conference
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Yamazaki, D.1
Yamamoto, T.2
Horinka, M.3
Nomura, H.4
Hashimoto, K.5
Onodera, H.6
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3
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0029492704
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A 1.9 GHz low-voltage silicon bipolar receiver front-end for wireless personal communications systems
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Dec
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J. Long and M. A. Copeland, "A 1.9 GHz Low-Voltage Silicon Bipolar Receiver Front-End for Wireless Personal Communications Systems," IEEE of Solid-State Circuits, vol. 30, no. 12, pp. 1438-1448, Dec 1995.
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Long, J.1
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4
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0342526743
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A monolithic transformer coupled 5W silicon power amplifier with 59% PAE at 0.9GHZ
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Dec
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W. Simbürger, H. D. Wohlmuth, and P. Weger, "A Monolithic Transformer Coupled 5W Silicon Power Amplifier with 59% PAE at 0.9GHZ," IEEE Journal of Solid-State Circuits, vol. 34, no. 12, pp. 1881-1892, Dec 1999.
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Simbürger, W.1
Wohlmuth, H.D.2
Weger, P.3
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5
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0034829269
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A 2.4GHz, 2.2W, 2 V fully integrated CMOS circular geometry active transformer power amplifier
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San Diego: IEEE, May
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I. Aoki, Kee, S.D., Rutledge, D., and Hajimiri, A., "A 2.4GHz, 2.2W, 2 V fully integrated CMOS circular geometry active transformer power amplifier," in IEEE Custom Integrated Circuits Conference. San Diego: IEEE, May 2001.
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IEEE Custom Integrated Circuits Conference
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Aoki, I.1
Kee, S.D.2
Rutledge, D.3
Hajimiri, A.4
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6
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4544284896
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A 2.5-V, 40Gb/s decision circuit using SiGe BiCMOS logic
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Honolulu, USA: IEEE, June
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T. Dickson, R. Beerkens, and S.P. Voinigescu, "A 2.5-V, 40Gb/s Decision Circuit Using SiGe BiCMOS Logic," in Symposium on VLSI Circuits. Honolulu, USA: IEEE, June 2004, pp. 206-209.
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Dickson, T.1
Beerkens, R.2
Voinigescu, S.P.3
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7
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0042591424
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A 1 V monolithic transformer-coupled 30-Gb/s 2:1 multiplexer in 120nm CMOS
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Philadelphia,USA: IEEE, June
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D. Kehrer, H.D. Wohlmuth, C. Kienmayer, and A.L. Scholtz, "A 1 V Monolithic Transformer-Coupled 30-Gb/s 2:1 Multiplexer in 120nm CMOS," in International Microwave Symposium. Philadelphia,USA: IEEE, June 2003, pp. 2261-2264.
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(2003)
International Microwave Symposium
, pp. 2261-2264
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Kehrer, D.1
Wohlmuth, H.D.2
Kienmayer, C.3
Scholtz, A.L.4
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8
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0242468193
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40-Gb/s 2:1 multiplexer and 1:2 demultiplexer in 120 nm standard CMOS
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Nov.
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D. Kehrer, H.D.Wohlmuth, H.Knapp, M.Wurzer, and A.L.Scholtz, "40-Gb/s 2:1 Multiplexer and 1:2 Demultiplexer in 120 nm Standard CMOS," Journal of Solid-State Circuits, vol. 38, no. 11, pp. 1830-1837, Nov. 2003.
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(2003)
Journal of Solid-state Circuits
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Kehrer, D.1
Wohlmuth, H.D.2
Knapp, H.3
Wurzer, M.4
Scholtz, A.L.5
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9
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0034822520
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Modeling of monolithic lumped planar transformers up to 20 GHz
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San Diego: IEEE, May
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D. Kehrer, W. Simbürger, H.D. Wohlmuth, and A.L. Scholtz, "Modeling of Monolithic Lumped Planar Transformers up to 20 GHz," in Custom Integrated Circuits Conference. San Diego: IEEE, May 2001, pp. 401-404.
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(2001)
Custom Integrated Circuits Conference
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Kehrer, D.1
Simbürger, W.2
Wohlmuth, H.D.3
Scholtz, A.L.4
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