Unified incremental physical-level and high-level synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 9, 2007, Pages 1576-1588

  Gu, Zhenyu ^a,b   Wang, Jia ^a,b   Dick, Robert P ^a,b   Zhou, Hai ^a,b  

^a IEEE

^b Northwestern University   (United States)

Author keywords

Behavioral synthesis; Floorplanning; Low power design

Indexed keywords

ALGORITHMS; AUTOMATION; ELECTRIC POWER UTILIZATION; PROBLEM SOLVING; SCHEDULING; STABILITY; SYSTEMS ANALYSIS;

BEHAVIORAL SYNTHESIS; FLOORPLANNING; LOW POWER DESIGN;

INTEGRATED CIRCUITS;

EID: 34548225519     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2007.895780     Document Type: Article

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