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Volumn 21, Issue 6, 2003, Pages 2352-2359

20 nm polysilicon gate patterning and application in 36 nm complementary metal-oxide-semiconductor devices

Author keywords

[No Author keywords available]

Indexed keywords

ANISOTROPY; BINDING ENERGY; CHEMICAL BONDS; CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; ELECTRON BEAM LITHOGRAPHY; GATES (TRANSISTOR); HIGH RESOLUTION ELECTRON MICROSCOPY; PLASMA ETCHING; REACTION KINETICS; SCANNING ELECTRON MICROSCOPY; SURFACE STRUCTURE; TRANSMISSION ELECTRON MICROSCOPY; X RAY PHOTOELECTRON SPECTROSCOPY;

EID: 0942289275     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.162051410.1116/1.1620514     Document Type: Article
Times cited : (11)

References (12)
  • 10
    • 85010836654 scopus 로고    scopus 로고
    • http://www-device.eecs.berkeley.edu/qmcv.html


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.