Study of the band-to-band tunneling hot-electron (BBHE) programming characteristics of p-channel bandgap-engineered SONOS (BE-SONOS)

IEEE Transactions on Electron Devices

Volumn 54, Issue 4, 2007, Pages 699-706

  Wu, Min Ta ^a   Lue, Hang Ting ^a   Hsieh, Kuang Yeu ^a   Liu, Rich ^a   Lu, Chih Yuan ^a  

^a MACRONIX INTERNATIONAL CO LTD   (Taiwan)

Author keywords

2 bit cell; Band to band tunneling hot electron (BBHE); Bandgap engineered SONOS (BE SONOS); Electron lateral profile; NAND Flash memory; P channel; Second bit effect; Simulation

Indexed keywords

COMPUTER SIMULATION; ENERGY GAP; FLASH MEMORY; HOT ELECTRONS; NAND CIRCUITS; SEMICONDUCTOR DEVICES;

BAND-TO-BAND TUNNELING HOT-ELECTRON; P-CHANNEL; SILICON-OXIDE-NITRIDE-OXIDE-SEMICONDUCTOR;

ELECTRON TUNNELING;

EID: 34147200959     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.891250     Document Type: Article

References (13)

1. H. T. Lue, S. Y. Wang, E. K. Lai, M. T. Wu, L. W. Yang, K. C. Chen, J. Ku, K. Y. Hsieh, R. Liu, and C. Y. Lu, "A novel p-channel NAND-type flash memory with 2 bit/cell operation and high programming throughput (> 20 MB/sec)," in IEDM Tech. Dig., 2005, pp. 331-334, session 13-7.
2. J. H. Park, S. H. Hur, J. H. Lee, J. T. Park, J. S. Sel, J. W. Kim, S. B. Song, J. Y. Lee, J. H. Lee, S. J. Son, Y. S. Kim, M. C. Park, S. J. Chai, J. D. Choi, U. I. Chung, J. T. Moon, K. T. Kim, K. Kim, and B. I. Ryu, "8 Gb MLC (multi-level cell) NAND Flash memory using 63 nm process technology," in IEDM Tech. Dig., 2004, pp. 873-876.
3. J. D. Lee, S. H. Hur, and J. D. Choi, "Effects of floating gate interferences on NAND Flash memory cell operation," IEEE Electron Device Lett., vol. 23, no. 5, pp. 264-266, May 2002.
4. K. Kim, "Technology for sub-50 nm DRAM and NAND flash manufacturing," in IEDM Tech. Dig., 2005, pp. 323-326, session 13-5.
5. M. H. White, D. A. Adams, and J. Bu, "On the Go with SONOS," IEEE Circuits Devices Mag., vol. 16, no. 4, pp. 22-31, Jul. 2000.
6. B. Eitan, P. Pavan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi, "NROM: A novel localized trapping, 2 bit nonvolatile memory cell," IEEE Electron Device Lett., vol. 21, no. 11, pp. 543-545, Nov. 2000.
7. + -poly gate nitride-trapping non-volatile memory device with excellent endurance and retention properties," in Proc. IRPS, 2005, pp. 168-174, session 2D-3.
8. W. J. Tsai, N. K. Zous, C. J. Liu, C. C. Liu, C. H. Chen, T. Wang, S. Pam, C. Y. Lu, and S. H. Gu, "Data retention of SONOS-type two-bit storage flash memory cell," in IEDM Tech. Dig., 2001, pp. 719-722, session 32-6.
9. H. T. Lue, S. Y. Wang, E. K. Lai, Y. H. Shih, S. C. Lai, L. W. Yang, K. C. Chen, J. Ku, K. Y. Hsieh, R. Liu, and C. Y. Lu, "BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability," in IEDM Tech. Dig., 2005, pp. 547-550, session 22-3.
10. H. T. Lue, S. Y. Wang, Y. H. Hsiao, E. K. Lai, L. W. Yang, T. Yang, K. C. Chen, K. Y. Hsieh, R. Liu, and C. Y. Lu, "Reliability model of bandgap engineered SONOS (BE-SONOS)," in IEDM Tech. Dig., 2006, pp. 495-498, session 18-5.
11. H. T. Lue, T. H. Hsu, M. T. Wu, K. Y. Hsieh, R. Liu, and C. Y. Lu, "Studies of the reverse read method and second-bit effect of 2 bit/cell nitride-trapping device by quasi-two-dimensional model," IEEE Trans. Electron Devices, vol. 53, no. 1, pp. 119-125, Jan. 2006.
12. E. Lusky, Y. S. Diamand, G. Mitenberg, A. Shappir, I. Bloom, and B. Eitan, "Investigation of channel hot electron injection by localized charge-trapping nonvolatile memory devices," IEEE Trans. Electron Devices, vol. 51, no. 3, pp. 444-451, Mar. 2004.
13. H. T. Lue, Y. H. Shih, K. Y. Hsieh, R. Liu, and C. Y. Lu, "A transient analysis method to characterize the trap vertical location in nitride trapping device," IEEE Electron Device Lett., vol. 25, no. 12, pp. 816-818, Dec. 2004.