SCOPUS 정보 검색 플랫폼

IEEE Electron Device Letters

Volumn 23, Issue 5, 2002, Pages 264-266

Effects of floating-gate interference on NAND flash memory cell operation

(3) Lee, Jae Duk a,b Hur, Sung Hoi b Choi, Jung Dal b

a Samsung Electronics Co Ltd ^*

b SAMSUNG Electronics (South Korea)

Author keywords

EPROM; Floating gate interference; MOS memory integrated circuits; Semiconductor device modeling

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; COUPLED CIRCUITS; GATES (TRANSISTOR); MOS CAPACITORS; NAND CIRCUITS; PROM; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR STORAGE; THRESHOLD VOLTAGE;

COUPLING RATIO; FLOATING GATE INTERFERENCE; NAND FLASH MEMORY CELL; PARASITIC CAPACITORS;

FLASH MEMORY;

EID: 0036575326 PISSN: 07413106 EISSN: None Source Type: Journal
DOI: 10.1109/55.998871 Document Type: Letter

Times cited : (487)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.