A transient analysis method to characterize the trap vertical location in nitride-trapping devices

IEEE Electron Device Letters

Volumn 25, Issue 12, 2004, Pages 816-818

  Lue, Hang Ting ^a   Shih, Yen Hao ^a   Hsieh, Kuang Yeu ^a   Liu, Rich ^a   Lu, Chih Yuan ^a  

^a MACRONIX INTERNATIONAL CO LTD   (Taiwan)

Author keywords

Nitride trap; NROM; SONOS; Transient analysis; Tunneling; Vertical location

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC FIELDS; ELECTRIC POTENTIAL; ELECTRON TRAPS; GATES (TRANSISTOR); MATHEMATICAL MODELS; ROM; SEMICONDUCTOR GROWTH; SILICON NITRIDE;

GATE INJECTION; NITRIDE TRAP; NROM; SONOS; TRANSIENT ANALYSIS; TRAP VERTICAL LOCATION;

NONVOLATILE STORAGE;

EID: 10644273634     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.839225     Document Type: Article

References (5)

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