A new current-mode incremental signaling scheme with applications to Gb/ s parallel links

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 54, Issue 2, 2007, Pages 255-267

  Wang, Tao ^a   Yuan, Fei ^a  

^a RYERSON UNIVERSITY   (Canada)

Author keywords

Current integrating receivers; Current mode incremental signaling (CMIS); Qigabits per second (Gbps) parallel links

Indexed keywords

AMPLIFIERS (ELECTRONIC); COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; ELECTRIC INDUCTORS; MICROSTRIP LINES; SIGNAL RECEIVERS;

CURRENT-INTEGRATING RECEIVERS; CURRENT-MODE INCREMENTAL SIGNALING (CMIS); HIGH-SPEED PARALLEL LINKS;

ELECTRIC SIGNAL SYSTEMS;

EID: 33947408347     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2006.885977     Document Type: Article

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