SLOPES: Hardware-software cosynthesis of low-power real-time distributed embedded systems with dynamically reconfigurable FPGAs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 3, 2007, Pages 508-525

  Shang, Li ^a,b   Dick, Robert P ^a,c   Jha, Niraj K ^a,d  

^a IEEE   (Canada)

^b QUEEN S UNIVERSITY   (Canada)

^c Northwestern University   (United States)

^d Princeton University   (United States)

Author keywords

Hardware software co design; Low power design; Reconfigurable architectures; System level synthesis

Indexed keywords

HARDWARE-SOFTWARE CO-DESIGN; LOW-POWER DESIGN; RECONFIGURABLE ARCHITECTURES; SYSTEM-LEVEL SYNTHESIS;

ALGORITHMS; COMPUTER HARDWARE; COMPUTER SOFTWARE; DISTRIBUTED COMPUTER SYSTEMS; ELECTRIC POWER UTILIZATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); SCHEDULING;

EMBEDDED SYSTEMS;

EID: 33847750688     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.883909     Document Type: Conference Paper

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