Iterative algorithm for hardware-software partitioning, hardware design space exploration and scheduling

Design Automation for Embedded Systems

Volumn 5, Issue 3, 2000, Pages 281-293

  Chatha, Karam S ^a   Vemuri, Ranga ^a  

^a University of Cincinnati   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; IMAGE COMPRESSION; ITERATIVE METHODS; SCHEDULING; STANDARDS; STORAGE ALLOCATION (COMPUTER);

HARDWARE-SOFTWARE PARTITIONING; JOINT PICTURE EXPERTS GROUP (JPEG) STANDARD;

EMBEDDED SYSTEMS;

EID: 0034248162     PISSN: 09295585     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008954218909     Document Type: Article

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