Energy advantages of microprocessor platforms with on-chip configurable logic

IEEE Design and Test of Computers

Volumn 19, Issue 6, 2002, Pages 36-43

  Stitt, Greg ^a   Vahid, Frank ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE; EMBEDDED SYSTEMS; ENERGY UTILIZATION; FORMAL LOGIC; PULSE CODE MODULATION;

FIELD-PROGRAMMABLE SYSTEM-LEVEL INTEGRATED CIRCUIT (FPSLIC);

MICROPROCESSOR CHIPS;

EID: 0036857029     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2002.1047742     Document Type: Article

References (9)

1. J. Henkel, "A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems," Proc. 36th Design Automation Conf. (DAC 99), ACM Press, New York, 1999, pp. 122-127.
2. M. Wan et al., "An Energy Conscious Methodology for Early Design Exploration of Heterogeneous DSPs," Proc. IEEE Custom Integrated Circuits Conf. (CICC 98), IEEE Press, Piscataway, N.J., 1998, pp.111-117.
3. P. Athanas and H. Silverman, "Processor Reconfiguration through Instruction-Set Metamorphosis," Computer, vol. 26, no. 3, Mar. 1993, pp. 11-18.
4. J. Hauser and J. Wawrzynek, "Garp: A MIPS Processor with a Reconfigurable Coprocessor," Proc. 5th Ann. IEEE Symp. FPGAs for Custom Computing Machines (FCCM 97), IEEE Press, Piscataway, N.J., 1997, pp. 12-21.
5. M. Wirthlin and B. Hutchings, "A Dynamic Instruction Set Computer," Proc. IEEE Symp. FPGAs for Custom Computing Machines (FCCM 95), IEEE Press, Piscataway, N.J., 1995, pp. 99-107.
6. G. Stitt et al., "Using On-Chip Configurable Logic to Reduce Embedded System Software Energy," Proc. 10th IEEE Symp. Field-Programmable Custom Computing Machines (FCCM 02), IEEE CS Press, Los Alamitos, Calif., 2002.
7. A. Malik, B. Moyer, and D. Cermak, "A Low Power Unified Cache Architecture Providing Power and Performance Flexibility," Proc. Int'l Symp. Low Power Electronics and Design (ISLPED 00), ACM Press, New York, 2000, pp. 241-243.
8. J. Villarreal et al., Loop Analysis of Embedded Applications, tech. report UCR-CSE-01-03, Computer Science and Eng. Dept., Univ. of California, Riverside, 2001.
9. C. Lee, M. Potkonjak, and W. Mangione-Smith, "MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communication Systems," Proc. 30th Ann. IEEE/ACM Int'l Symp. Microarchitecture (MICRO 30), IEEE CS Press, Los Alamitos, Calif., 1997, pp. 330-335.