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Volumn , Issue , 2000, Pages 507-512

Hardware-software co-design of embedded reconfigurable architectures

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; C (PROGRAMMING LANGUAGE); COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS; PROGRAM PROCESSORS; RANDOM ACCESS STORAGE; RESPONSE TIME (COMPUTER SYSTEMS);

EID: 0033720597     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2000.855363     Document Type: Article
Times cited : (197)

References (13)
  • 1
    • 0002612844 scopus 로고    scopus 로고
    • Instruction level parallelism for reconfigurable computing
    • T. J. Callahan J. Wawrzynek Instruction level parallelism for reconfigurable computing Proc. 8 Intl. Workshop on Field-Programmable Logic and Applications Proc. 8 Intl. Workshop on Field-Programmable Logic and Applications 1998-Sept.
    • (1998)
    • Callahan, T.J.1    Wawrzynek, J.2
  • 2
    • 44949204814 scopus 로고    scopus 로고
    • COSYN: hardware-software co-synthesis of embedded systems
    • B. Dave G. Lakshminarayana N. Jha COSYN: hardware-software co-synthesis of embedded systems Proc. 34th Design Automation Conference Proc. 34th Design Automation Conference 1997
    • (1997)
    • Dave, B.1    Lakshminarayana, G.2    Jha, N.3
  • 3
    • 85177118179 scopus 로고    scopus 로고
    • Cords: hardware-software cosynthesis of reconfigurable real-time distributed embedded systems
    • R. P. Dick N. K. Jha Cords: hardware-software cosynthesis of reconfigurable real-time distributed embedded systems Proc. Intl. Conference on Computer-Aided Design Proc. Intl. Conference on Computer-Aided Design 1998
    • (1998)
    • Dick, R.P.1    Jha, N.K.2
  • 5
    • 0001858873 scopus 로고
    • Hardware-software cosynthesis for digital systems
    • R. Gupta G. De Micheli Hardware-software cosynthesis for digital systems IEEE Design and Test of Computers 10 3 29 41 Sept. 1993
    • (1993) IEEE Design and Test of Computers , vol.10 , Issue.3 , pp. 29-41
    • Gupta, R.1    De Micheli, G.2
  • 6
    • 85177114872 scopus 로고    scopus 로고
    • Garp: A MIPS processor with a reconfigurable coprocessor
    • J. R. Hauser J. Wawrzynek Garp: A MIPS processor with a reconfigurable coprocessor Proc. FCCM '97 Proc. FCCM '97 1997
    • (1997)
    • Hauser, J.R.1    Wawrzynek, J.2
  • 7
    • 0028581812 scopus 로고
    • A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem
    • A. Kalavade E. A. Lee A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem Proc. International Workshop on Hardware-software Co-design 42 48 Proc. International Workshop on Hardware-software Co-design 1994
    • (1994) , pp. 42-48
    • Kalavade, A.1    Lee, E.A.2
  • 8
    • 85177110445 scopus 로고    scopus 로고
    • An automated temporal partitioning and loop fission approach for FPGA based reconfigurable synthesis of DSP applications
    • M. Kaul An automated temporal partitioning and loop fission approach for FPGA based reconfigurable synthesis of DSP applications Proc. 36 Design Automation Conference Proc. 36 Design Automation Conference 1999
    • (1999)
    • Kaul, M.1
  • 9
    • 0033343643 scopus 로고    scopus 로고
    • Hardware/software co-synthesis with memory hierarchies
    • Y. Li W. Wolf Hardware/software co-synthesis with memory hierarchies IEEE Transactions on CAD 18 10 1405 1417 Oct. 1999
    • (1999) IEEE Transactions on CAD , vol.18 , Issue.10 , pp. 1405-1417
    • Li, Y.1    Wolf, W.2
  • 10
    • 0000679218 scopus 로고
    • SOS: synthesis of application-specific heterogeneous multiprocessor systems
    • S. Prakash A. Parker SOS: synthesis of application-specific heterogeneous multiprocessor systems Journal of Parallel and Distributed Computing 16 338 351 1992
    • (1992) Journal of Parallel and Distributed Computing , vol.16 , pp. 338-351
    • Prakash, S.1    Parker, A.2
  • 11
    • 0028467725 scopus 로고
    • Hardware/software co-design of embedded systems
    • W. Wolf Hardware/software co-design of embedded systems Proceedings of the IEEE July 1994
    • (1994) Proceedings of the IEEE
    • Wolf, W.1
  • 12
    • 85177141391 scopus 로고
    • Automatic synthesis of parallel programs targeted to dynamically reconfigurable logic arrays
    • M. B. Gokhale A. Marks Automatic synthesis of parallel programs targeted to dynamically reconfigurable logic arrays Proc. FPL Proc. FPL 1995
    • (1995)
    • Gokhale, M.B.1    Marks, A.2
  • 13
    • 85177131946 scopus 로고    scopus 로고
    • ACE2 Card Manual 1998 TSI Telsys
    • (1998)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.