메뉴 건너뛰기




Volumn 2005, Issue , 2005, Pages 1039-1048

Transient fault characterization in dynamic noisy environments

Author keywords

Fault detection; Fault modeling; On line characterization; Soft faults; Transient faults

Indexed keywords

ERROR DETECTION; OBSERVABILITY; ONLINE SYSTEMS; SPURIOUS SIGNAL NOISE; TRANSIENTS;

EID: 33847105879     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2005.1584070     Document Type: Conference Paper
Times cited : (23)

References (34)
  • 2
    • 33847147408 scopus 로고    scopus 로고
    • Tutorial: Ghosts in the machine: A tutorial on single-event upsets in advanced commercial silicon technology
    • R. Baumann. Tutorial: Ghosts in the machine: A tutorial on single-event upsets in advanced commercial silicon technology. In Int'l Test Conf., 2004.
    • (2004) Int'l Test Conf
    • Baumann, R.1
  • 4
    • 0030349739 scopus 로고    scopus 로고
    • Single event upset at ground level
    • E. Normand. Single event upset at ground level. IEEE Trans. on Nuclear Science, 43(6):2742-2750, 12 1996.
    • IEEE Trans. on Nuclear Science , vol.43 , Issue.6
    • Normand, E.1
  • 5
    • 0001507918 scopus 로고
    • Spacecraft problems in association with episodes of intense solar activity and related terrestrial phenomena during march 1991
    • M.A. Shea, D.F. Smart, J.H. Allen, and D.C. Wilkinson. Spacecraft problems in association with episodes of intense solar activity and related terrestrial phenomena during march 1991. IEEE Trans. on Nuclear Sceince, 39(6): 1754-1760, 1992.
    • (1992) IEEE Trans. on Nuclear Sceince , vol.39 , Issue.6 , pp. 1754-1760
    • Shea, M.A.1    Smart, D.F.2    Allen, J.H.3    Wilkinson, D.C.4
  • 6
    • 0032319596 scopus 로고    scopus 로고
    • Single event upsets in implantable cardioverter defibrillators
    • P.D. Bradley and E. Normand. Single event upsets in implantable cardioverter defibrillators. IEEE Trans. on Nuclear Science, 45(6):2929-2940, 12 1998.
    • IEEE Trans. on Nuclear Science , vol.45 , Issue.6
    • Bradley, P.D.1    Normand, E.2
  • 7
    • 0038310282 scopus 로고    scopus 로고
    • A systematic approach to SER estimation and solutions
    • H.T. Nguyen and Y. Yagil. A systematic approach to SER estimation and solutions. In Int'l Reiliability Physics Symp., pages 60-70, 2003.
    • (2003) Int'l Reiliability Physics Symp , pp. 60-70
    • Nguyen, H.T.1    Yagil, Y.2
  • 9
    • 0036956115 scopus 로고    scopus 로고
    • Impact of scaling on soft-error rates in commercial microprocessors
    • N. Seifert, X. Zhu, and L.W. Massengill. Impact of scaling on soft-error rates in commercial microprocessors. IEEE Trans. on Nuclear Science, 49(6):3100-3106, 2002.
    • (2002) IEEE Trans. on Nuclear Science , vol.49 , Issue.6 , pp. 3100-3106
    • Seifert, N.1    Zhu, X.2    Massengill, L.W.3
  • 10
    • 0029536513 scopus 로고
    • Critical charge concepts for CMOS SRAMs
    • P.E. Dodd and F.W. Sexton. Critical charge concepts for CMOS SRAMs. IEEE Trans. on Nuclear Sceince, 42(6):1764-1770, 1995.
    • (1995) IEEE Trans. on Nuclear Sceince , vol.42 , Issue.6 , pp. 1764-1770
    • Dodd, P.E.1    Sexton, F.W.2
  • 11
    • 33745494147 scopus 로고    scopus 로고
    • How to cope with SEU/SET at system level?
    • M. Pignol. How to cope with SEU/SET at system level? In Int'l On-Line Testing Symp., pages 315-318, 2005.
    • (2005) Int'l On-Line Testing Symp , pp. 315-318
    • Pignol, M.1
  • 12
    • 35248835250 scopus 로고    scopus 로고
    • Byzantine fault tolerance, from theory to reality
    • SAFECOMP Conf, of, Springer
    • K. Driscoll, B. Hall, H. Sivencrona, and P. Zumsteg. Byzantine fault tolerance, from theory to reality. In SAFECOMP Conf., volume 2788 of LNCS, pages 235-248. Springer, 2003.
    • (2003) LNCS , vol.2788 , pp. 235-248
    • Driscoll, K.1    Hall, B.2    Sivencrona, H.3    Zumsteg, P.4
  • 13
    • 33847159043 scopus 로고    scopus 로고
    • Gigascale integration for teraops performance-challenges, opportunities, and new frontiers
    • P.P. Gelsinger. Gigascale integration for teraops performance-challenges, opportunities, and new frontiers. In Design Automation Conf., page xxv, 2004.
    • (2004) Design Automation Conf
    • Gelsinger, P.P.1
  • 16
    • 4244057196 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors (ITRS) 2003 Edition
    • International Technology Roadmap for Semiconductors (ITRS) 2003 Edition: Process Integration, Devices, and Structures, 2003.
    • (2003) Process Integration, Devices, and Structures
  • 18
    • 0033749865 scopus 로고    scopus 로고
    • Neutron-induced boron fission as a major source of soft errors in deep submicron SRAM devices
    • R.C. Baumann and E.B. Smith. Neutron-induced boron fission as a major source of soft errors in deep submicron SRAM devices. In Int'l Reliability Physics Symp., pages 152-157, 2000.
    • (2000) Int'l Reliability Physics Symp , pp. 152-157
    • Baumann, R.C.1    Smith, E.B.2
  • 19
  • 20
    • 0038721289 scopus 로고    scopus 로고
    • Basic mechanisms and modeling of single-event upset in digital microelectronics
    • P.E. Dodd and L.W. Massengill. Basic mechanisms and modeling of single-event upset in digital microelectronics. IEEE Trans. on Nuclear Science, 50(3):583-602, 2003.
    • (2003) IEEE Trans. on Nuclear Science , vol.50 , Issue.3 , pp. 583-602
    • Dodd, P.E.1    Massengill, L.W.2
  • 22
    • 0031373956 scopus 로고    scopus 로고
    • Attenuation of single event induced pulses in CMOS combinational logic
    • M.P. Baze and S.P. Buchner. Attenuation of single event induced pulses in CMOS combinational logic. IEEE Trans. on Nuclear Sceince, 44(6):2217-2223, 1997.
    • (1997) IEEE Trans. on Nuclear Sceince , vol.44 , Issue.6 , pp. 2217-2223
    • Baze, M.P.1    Buchner, S.P.2
  • 24
    • 0142184763 scopus 로고    scopus 로고
    • Cost-effective approach for reducing soft error failure rate in logic circuits
    • K. Mohanram and N.A. Touba. Cost-effective approach for reducing soft error failure rate in logic circuits. In Int'l Test Conf., pages 893-901, 2003.
    • (2003) Int'l Test Conf , pp. 893-901
    • Mohanram, K.1    Touba, N.A.2
  • 25
    • 0029510949 scopus 로고
    • An experimental chip to evaluate test techniques experimental results
    • S.C. Ma, P. Franco, and E.J. McCluskey. An experimental chip to evaluate test techniques experimental results. In Int'l Test Conf., pages 663-672, 1995.
    • (1995) Int'l Test Conf , pp. 663-672
    • Ma, S.C.1    Franco, P.2    McCluskey, E.J.3
  • 26
    • 0018331014 scopus 로고    scopus 로고
    • Alpha-particle-induced soft errors in dynamic memories
    • T.C. May and M.H. Woods. Alpha-particle-induced soft errors in dynamic memories. IEEE Trans. on Electron Devices, 26(1):2-9, 1 1979.
    • IEEE Trans. on Electron Devices , vol.26 , Issue.1
    • May, T.C.1    Woods, M.H.2
  • 30
    • 33847094442 scopus 로고    scopus 로고
    • Error-tolerance and related test issues
    • M. Breuer. Error-tolerance and related test issues. In Asian Test Symp., page xxi, 2004.
    • (2004) Asian Test Symp
    • Breuer, M.1
  • 31
    • 0036446342 scopus 로고    scopus 로고
    • An ATPG for threshold testing: Obtaining acceptable yield in future processes
    • Z. Jiang and S.K. Gupta. An ATPG for threshold testing: Obtaining acceptable yield in future processes. In Inl'l Test Conf., pages 824-833, 2002.
    • (2002) Inl'l Test Conf , pp. 824-833
    • Jiang, Z.1    Gupta, S.K.2
  • 33
    • 0030386822 scopus 로고    scopus 로고
    • Novel bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced isolation (STIOS) and gate to shallow-well contact (SSS-C) processes for ultra low power dual gate CMOS
    • H. Kotaki, S. Kakimoto, M. Nakano, T. Matsuoka, K. Adachi, K. Sugimoto, T. Fukushima, and Y. Sato. Novel bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced isolation (STIOS) and gate to shallow-well contact (SSS-C) processes for ultra low power dual gate CMOS. In Int'l Electron Devices Meeting, pages 459-462, 1996.
    • (1996) Int'l Electron Devices Meeting , pp. 459-462
    • Kotaki, H.1    Kakimoto, S.2    Nakano, M.3    Matsuoka, T.4    Adachi, K.5    Sugimoto, K.6    Fukushima, T.7    Sato, Y.8
  • 34
    • 0032669133 scopus 로고    scopus 로고
    • Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages
    • N. Lindert, T. Sugii, S. Tang, and C. Hu. Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages. IEEE Jour. of Solid-State Circ., 34(1):85-89,1 1999.
    • IEEE Jour. of Solid-State Circ , vol.34 , Issue.1
    • Lindert, N.1    Sugii, T.2    Tang, S.3    Hu, C.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.