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Volumn 49 I, Issue 6, 2002, Pages 3100-3106

Impact of scaling on soft-error rates in commercial microprocessors

Author keywords

Alpha particle; Core logic; Data path; Dynamic circuits; Error correction codes (ECC); Latch; Microprocessor; Neutron; SEE; Single event upset (SEU); Soft error; Soft error rate (SER)

Indexed keywords

ALPHA PARTICLES; BIT ERROR RATE; CHIP SCALE PACKAGES; ELECTRIC CHARGE; ERROR CORRECTION; FLIP CHIP DEVICES; NEUTRONS;

EID: 0036956115     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2002.805402     Document Type: Conference Paper
Times cited : (138)

References (12)
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  • 8
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    • "Measurement and reporting of alpha particles and terrestrial cosmic ray-induced soft errors in semiconductor devices,", JEDEC Standard JESD89. For more information, see http://www.jedec.org/, Aug. 2001.
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  • 9
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    • Comparison of error rates in combinational and sequential logic
    • Dec.
    • S. Buchner et al., "Comparison of error rates in combinational and sequential logic," IEEE Trans. Nucl. Sci., vol. 44, pp. 2209-2216, Dec. 1997.
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    • Buchner, S.1
  • 10
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    • Cosmic and terrestrial single-event radiation effects in dynamic random access memories
    • Apr.
    • L. Massengill, "Cosmic and terrestrial single-event radiation effects in dynamic random access memories," IEEE Trans. Nucl. Sci., vol. 43, pp. 576-593, Apr. 1996.
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    • Massengill, L.1
  • 11
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    • Impact of CMOS technology scaling on the atmospheric neutron soft error rate
    • Dec.
    • P. Hazucha and C. Svensson, "Impact of CMOS technology scaling on the atmospheric neutron soft error rate," IEEE Trans. Nucl. Sci., vol. 47, Dec. 2000.
    • (2000) IEEE Trans. Nucl. Sci. , vol.47
    • Hazucha, P.1    Svensson, C.2
  • 12
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    • Impact of CMOS process scaling and SOI on the soft error rates of logic processes
    • S. Hareland, J. Maiz, M. Alavi, K. Mistry, S. Walsta, and C. Dai, "Impact of CMOS process scaling and SOI on the soft error rates of logic processes," VLSI Tech. Dig., pp. 73-74, 2001.
    • (2001) VLSI Tech. Dig. , pp. 73-74
    • Hareland, S.1    Maiz, J.2    Alavi, M.3    Mistry, K.4    Walsta, S.5    Dai, C.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.