Towards SET mitigation in RF digital PLLs: From error characterization to radiation hardening considerations

IEEE Transactions on Nuclear Science

Volumn 53, Issue 4, 2006, Pages 2047-2053

  Boulghassoul, Y ^a,b,c   Massengill, L W ^a,b   Sternberg, A L ^a,b   Bhuva, B L ^a,b   Holman, W T ^a,b  

^a IEEE   (United States)

^b VANDERBILT UNIVERSITY   (United States)

^c UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

Charge pump; Digital phase locked loop (DPLL); Frequency phase detector; Hardening by design; RF operation; Single event transients (SETs); Voltage controlled oscillator (VCO)

Indexed keywords

DIGITAL PHASE-LOCKED LOOP (DPLL); FREQUENCY-PHASE DETECTOR; HARDENING BY DESIGN; SINGLE-EVENT TRANSIENTS (SET); VOLTAGE-CONTROLLED OSCILLATOR (VCO);

ELECTRIC POTENTIAL; HEAVY IONS; IONIZATION; RADIATION HARDENING;

PHASE LOCKED LOOPS;

EID: 33748346652     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2006.876035     Document Type: Conference Paper

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