Fast floorplanning by look-ahead enabled recursive bipartitioning

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 9, 2006, Pages 1719-1732

  Cong, Jason ^a,b   Romesis, Michail ^a,c   Shinnerl, Joseph R ^a,b  

^a IEEE   (United States)

^b University of California   (United States)

^c MAGMA DESIGN AUTOMATION   (United States)

Author keywords

Floorplanning; Optimization; Partitioning; Physical design

Indexed keywords

FLOORPLANNING; PARTITIONING; PHYSICAL DESIGN; RECURSIVE BIPARTITIONING;

BENCHMARKING; CONSTRAINT THEORY; INTEGRATED CIRCUITS; OPTIMIZATION; RECURSIVE FUNCTIONS;

COMPUTER AIDED DESIGN;

EID: 33748097477     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.859519     Document Type: Article

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