A novel geometric algorithm for fast wire-optimized floorplanning

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 74-80

  Sassone, Peter G ^a   Lim, Sung K ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; CONSTRAINT THEORY; DATA STRUCTURES; HEURISTIC METHODS; ITERATIVE METHODS; MICROPROCESSOR CHIPS; SIMULATED ANNEALING;

GEOMETRIC ALGORITHMS; WIRE OPTIMIZED FLOORPLANNING;

VLSI CIRCUITS;

EID: 0346778806     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.2003.159673     Document Type: Conference Paper

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