Gate line edge roughness amplitude and frequency variation effects on intra die MOS device characteristics

Solid-State Electronics

Volumn 50, Issue 6, 2006, Pages 1156-1163

  Hamadeh, Emad ^a,b   Gunther, Norman G ^a   Niemann, Darrell ^a   Rahman, Mahmud ^a  

^a SANTA CLARA UNIVERSITY   (United States)

^b Applied Micro Circuits Corporation   (United States)

Author keywords

Capacitance; Line edge roughness; Lognormal distribution; MOS device; Roughness amplitude; Roughness frequency; Roughness wavelength; TCAD; Thermodynamic variational model; Threshold voltage

Indexed keywords

CAPACITANCE; ELECTRIC PROPERTIES; MATHEMATICAL MODELS; NUMERICAL ANALYSIS; STATISTICAL METHODS; SURFACE ROUGHNESS; THRESHOLD VOLTAGE;

LINE EDGE ROUGHNESS; LOGNORMAL DISTRIBUTION; ROUGHNESS AMPLITUDE; ROUGHNESS FREQUENCY; ROUGHNESS WAVELENGTH; TCAD; THERMODYNAMIC-VARIATIONAL MODEL;

MOS DEVICES;

EID: 33745877342     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2006.04.031     Document Type: Article

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