Hardware compilation of application-specific memory-access interconnect

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 5, 2006, Pages 756-771

  Venkataramani, Girish ^a,b   Bjerregaard, Tobias ^a,c   Chelcea, Tiberiu ^a,b,d   Goldstein, Seth C ^a,b,d  

^a IEEE   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^d Carnegie Mellon University   (United States)

Author keywords

Communication synthesis; Dataflow synthesis; High level synthesis (HLS); Interface design

Indexed keywords

COMMUNICATION SYNTHESIS; DATAFLOW SYNTHESIS; HIGH-LEVEL SYNTHESIS (HLS); INTERFACE DESIGN;

DATA STORAGE EQUIPMENT; METROPOLITAN AREA NETWORKS; OPTICAL INTERCONNECTS; OPTIMIZATION; SCHEDULING; SPECIFICATIONS; STATISTICAL METHODS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 33646429255     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.870411     Document Type: Conference Paper

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