Interface synthesis using memory mapping for an FPGA platform

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2003, Pages 140-145

  Luthra, Manev ^a   Gupta, Sumit ^a   Dutt, Nikil ^a   Gupta, Rajesh ^b   Nicolau, Alex ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DATA STORAGE EQUIPMENT; DESIGN FOR TESTABILITY; FIELD PROGRAMMABLE GATE ARRAYS;

INTERFACE SYNTHESIS; MEMORY MAPPING; SYSTEM ON CHIP;

INTEGRATED CIRCUIT LAYOUT;

EID: 0345413289     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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