A general hierarchical circuit modeling and simulation algorithm

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 24, Issue 3, 2005, Pages 418-434

  Tan, Sheldon X D ^a  

^a University of California Riverside   (United States)

Author keywords

Behavioral modeling; Circuit simulation; Determinant decision diagrams; Matrix determinant; Model order reduction

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; CAPACITANCE; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; ELECTRIC RESISTANCE; HIERARCHICAL SYSTEMS; INDUCTANCE; ITERATIVE METHODS; MATHEMATICAL MODELS; MATRIX ALGEBRA;

BEHAVIORAL MODELING; CIRCUIT SIMULATION; DETERMINANT DECISION DIAGRAMS; MATRIX DETERMINANT; MODEL ORDER REDUCTION;

ELECTRIC NETWORK ANALYSIS;

EID: 15244363241     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.842815     Document Type: Article

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