Substrate current and degradation of n-channel polycrystalline silicon thin-film transistors

Microelectronics Reliability

Volumn 45, Issue 2, 2005, Pages 341-348

  Hastas, N A ^a   Archontas, N ^b   Dimitriadis, C A ^a   Kamarinos, G ^c   Nikolaidis, T ^a   Georgoulas, N ^b   Thanailakis, A ^b  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b DEMOCRITUS UNIVERSITY OF THRACE   (Greece)

^c IMEP LAHC   (France)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN JUNCTION; N-CHANNEL POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS; SELF-HEATING EFFECTS; SUBSTRATE CURRENTS;

ANNEALING; COMPUTER SIMULATION; DEGRADATION; ELECTRON CYCLOTRON RESONANCE; EXCIMER LASERS; IMPACT IONIZATION; MOSFET DEVICES; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; POLYSILICON; THRESHOLD VOLTAGE;

THIN FILM TRANSISTORS;

EID: 11344292818     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.06.004     Document Type: Conference Paper

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