Analysis of threshold voltage shift caused by bias stress in low temperature poly-Si TFTs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 527-530

  Inoue, Satoshi ^a   Ohshima, Hiroyuki ^a   Shimoda, Tatsuya ^a  

^a SEIKO EPSON CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

THRESHOLD VOLTAGE SHIFT;

CURRENT VOLTAGE CHARACTERISTICS; HEATING; LOW TEMPERATURE PROPERTIES; POLYCRYSTALS; SEMICONDUCTING SILICON; STRESS ANALYSIS;

THIN FILM TRANSISTORS;

EID: 84886448003     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)