Effect of grain boundaries on hot-carrier induced degradation in large grain polysilicon thin-film transistors

Solid-State Electronics

Volumn 44, Issue 11, 2000, Pages 2045-2051

  Dimitriadis, C A ^a   Kimura, M ^b   Miyasaka, M ^b   Inoue, S ^b   Farmakis, F V ^c   Brini, J ^c   Kamarinos, G ^c  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b SEIKO EPSON CORPORATION   (Japan)

^c Grenoble INP Phelma   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER MOBILITY; COMPUTER SIMULATION; DEGRADATION; GRAIN BOUNDARIES; HOT CARRIERS; PHOTOEMISSION; STRESS ANALYSIS;

POLYSILICON;

THIN FILM TRANSISTORS;

EID: 0034322586     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(00)00082-4     Document Type: Article

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