A comparative study between total thickness variance and site flatness of polished silicon wafer

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 40, Issue 9 A, 2001, Pages 5300-5301

  Oh, Han Seog ^a,b   Lee, Hong Lim ^a  

^a Yonsei University   (South Korea)

^b MEMC Korea   (South Korea)

Author keywords

CMP; Flatness; Polishing; SBIR; SFQR; TTV

Indexed keywords

CAPACITORS; CARBON; CHEMICAL POLISHING; INTEGRATED CIRCUIT LAYOUT; LEAST SQUARES APPROXIMATIONS; SCANNING; STATISTICAL METHODS; SURFACE STRUCTURE; TRANSDUCERS;

FIXED QUALITY AREA; MONOCRYSTALLINE SILICON WAFER; SITE BACK IDEAL FOCAL PLANE RANGE; SITE FRONT LEAST SQUARE FOCAL PLANE RANGE; SITE TOTAL INDICATOR READINGS; TOTAL THICKNESS VARIANCE;

SILICON WAFERS;

EID: 0035456947     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.40.5300     Document Type: Article

References (10)