Stresses and fracture at the chip/underfill interface in flip-chip assemblies

Journal of Electronic Packaging

Volumn 125, Issue 1, 2003, Pages 44-52

  Park, Ji Eun ^a   Jasiuk, Iwona ^b   Zubelewicz, Alek ^c  

^a LOCKHEED MARTIN   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c LOS ALAMOS NATIONAL LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; FRACTURE; INTEGRAL EQUATIONS; INTERFACES (MATERIALS); SEMICONDUCTOR DEVICE MODELS; STRESS INTENSITY FACTORS; STRESSES;

FLIP CHIP ASSEMBLY; J-INTEGRAL APPROACH;

CHIP SCALE PACKAGES;

EID: 0141964186     PISSN: 10437398     EISSN: None     Source Type: Journal    
DOI: 10.1115/1.1527656     Document Type: Article

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