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Volumn , Issue , 1998, Pages 94-99

Design methodologies for noise in digital integrated circuits

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT DESIGN; TIMING CIRCUITS; INTEGRATED CIRCUIT LAYOUT; SPURIOUS SIGNAL NOISE;

EID: 0031619509     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277062     Document Type: Conference Paper
Times cited : (69)

References (14)
  • 1
    • 0031678361 scopus 로고    scopus 로고
    • Conquering noise in deep submicron digital design
    • January/March
    • K. L. Shepard and V. Narayanan. Conquering noise in deep submicron digital design. IEEE Design and Test of Computers, pages 51 - 62, January/March 1998.
    • (1998) IEEE Design and Test of Computers , pp. 51-62
    • Shepard, K.L.1    Narayanan, V.2
  • 5
    • 0031210445 scopus 로고    scopus 로고
    • Floating-body effects in partially depleted SOI CMOS cicuits
    • August
    • Pong-Fei Lu et al. Floating-body effects in partially depleted SOI CMOS cicuits. IEEE Journal of Solid-State Circuits, 32(8):1241-1253, August 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , Issue.8 , pp. 1241-1253
    • Lu, P.-F.1
  • 6
    • 0026955423 scopus 로고
    • A 200 MHz 64b Dual-Issue CMOS Microprocessor
    • D. Dobberpuhl et al. A 200 MHz 64b Dual-Issue CMOS Microprocessor. IEEE Journal of Solid-State Circuits, 27(11);1555 - 1567, 1992.
    • (1992) IEEE Journal of Solid-State Circuits , vol.27 , Issue.11 , pp. 1555-1567
    • Dobberpuhl, D.1
  • 8
    • 0028448853 scopus 로고
    • Adaptively controlled explicit simulation
    • Anirudh Devgan and Ronald A. Rohrer. Adaptively controlled explicit simulation. IEEE Trans. CAD, 13(6):746 - 761, 1994.
    • (1994) IEEE Trans. CAD , vol.13 , Issue.6 , pp. 746-761
    • Devgan, A.1    Rohrer, R.A.2
  • 11
    • 0029705113 scopus 로고    scopus 로고
    • Minimizing chip-level simultaneous switching noise for high-performance microprocessor design
    • H. H. Chen. Minimizing chip-level simultaneous switching noise for high-performance microprocessor design. In Proceedings of the IEEE International Symposium on Circuits and Systems, volume 4, pages 544 - 547, 1996.
    • (1996) Proceedings of the IEEE International Symposium on Circuits and Systems , vol.4 , pp. 544-547
    • Chen, H.H.1
  • 13
    • 0030387972 scopus 로고    scopus 로고
    • A coordinate-transformed arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits
    • San Jose, CA, November
    • L. Miguel Silveira, Mattan Kamon, Ibrahim Elfadel, and Jacob White. A Coordinate-Transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of RLC Circuits. In IEEE/ACM International Conference on Computer- Aided Design, pages 288 - 294, San Jose, CA, November 1996.
    • (1996) IEEE/ACM International Conference on Computer- Aided Design , pp. 288-294
    • Miguel Silveira, L.1    Kamon, M.2    Elfadel, I.3    White, J.4
  • 14
    • 0029227119 scopus 로고
    • Reduced-order modeling of large linear subcircuits via a block lanczos algorithm
    • San Francisco, California, June
    • Peter Feldmann and Roland W. Freund. Reduced-order modeling of large linear subcircuits via a block lanczos algorithm. In 32nd ACM/IEEE Design Automation Conference, pages 474479, San Francisco, California, June 1995.
    • (1995) 32nd ACM/IEEE Design Automation Conference , pp. 474-479
    • Feldmann, P.1    Freund, R.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.