Hardware-software partitioning and pipelined scheduling of transformative applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 10, Issue 3, 2002, Pages 193-208

  Chatha, Karam S ^a,b,c   Vemuri, Ranga ^a,b  

^a IEEE   (United States)

^b University of Cincinnati   (United States)

^c Arizona State University   (United States)

Author keywords

Image processing; Partitioning; Performance tradeoffs; Pipelining; Scheduling; System level design

Indexed keywords

ITERATIVE DATA FLOW; JOINT PHOTOGRAPHER EXPERTS GROUP; MOTION PICTURE EXPERTS GROUP; PIPELINED SCHEDULING;

ALGORITHMS; CONSTRAINT THEORY; EMBEDDED SYSTEMS; GRAPH THEORY; HEURISTIC METHODS; IMAGE COMPRESSION; ITERATIVE METHODS; MATHEMATICAL TRANSFORMATIONS; MULTIMEDIA SYSTEMS; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS; SCHEDULING;

DIGITAL SIGNAL PROCESSING;

EID: 0036625241     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2002.1043323     Document Type: Article

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